M42800A Atmel Corporation, M42800A Datasheet - Page 94
M42800A
Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.M42800A.pdf
(224 pages)
4.M42800A.pdf
(27 pages)
Specifications of M42800A
Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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14.23 AIC End of Interrupt Command Register
Register Name:
Access Type:
Offset:
The End of Interrupt Command Register is used by the interrupt routine to indicate that the interrupt treatment is complete.
Any value can be written because it is only necessary to make a write to this register location to signal the end of interrupt
treatment.
14.24 AIC Spurious Vector Register
Register Name:
Access Type:
Offset:
Reset Value:
• SPUVEC: Spurious Interrupt Vector Handler Address
The user may store the address of the spurious interrupt handler in this register.
94
31
23
15
31
23
15
–
–
–
7
–
7
AT91M42800A
30
22
14
30
22
14
AIC_EOICR
Write-only
0x130
AIC_SPU
Read/Write
0x134
0
–
–
–
6
–
6
29
21
13
29
21
13
–
–
–
5
–
5
28
20
12
28
20
12
–
–
–
4
–
4
SPUVEC
SPUVEC
SPUVEC
SPUVEC
27
19
11
27
19
11
–
–
–
3
3
–
26
18
10
26
18
10
–
–
–
2
–
2
25
17
25
17
–
9
–
1
9
1
–
–
1779D–ATARM–14-Apr-06
24
16
24
16
–
–
8
–
0
–
8
0
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