M42800A Atmel Corporation, M42800A Datasheet - Page 26

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 11-2. Memory Connections for Four External Devices
Figure 11-3. Memory Connections for Eight External Devices
11.6
26
Data Bus Width
AT91M42800A
EBI
NCS0 - NCS3
CS4 - CS7
D0 - D15
A0 - A19
EBI
NWRx
NCS0 - NCS3
NRD
D0 - D15
A0 - A23
Notes:
Notes:
A data bus width of 8 or 16 bits can be selected for each chip select. This option is controlled
by the DBW field in the EBI_CSR (Chip Select Register) for the corresponding chip select.
Figure 11-4 shows how to connect a 512K x 8-bit memory on NCS2.
NWRx
NRD
1. For four external devices, the maximum address space per device is 16M bytes.
1. For eight external devices, the maximum address space per device is 1M byte.
(1)
(1)
8 or 16
NCS0
NCS1
8 or 16
NCS0
NCS2
D0 - D15 or D0 - D7
Memory Enable
Output Enable
Write Enable
A0 - A19
NCS1
NCS3
NCS2
Memory Enable
CS4
D0 - D15 or D0 - D7
NCS3
Memory Enable
Output Enable
Write Enable
A0 - A23
Memory Enable
CS5
Memory Enable
Memory Enable
CS6
Memory Enable
Memory Enable
CS7
Memory Enable
Memory Enable
Memory Enable
Memory Enable
1779D–ATARM–14-Apr-06