M42800A Atmel Corporation, M42800A Datasheet - Page 218

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ii
AT91M42800A
12 PMC: Power Management Controller .......................................55
13 ST: System Timer .......................................................................71
11.8 Boot on NCS0 ....................................................................................... 29
11.9 Read Protocols ..................................................................................... 29
11.10 Write Data Hold Time ......................................................................... 31
11.11 Wait States ......................................................................................... 32
11.12 Memory Access Waveforms ...............................................................36
11.13 EBI User Interface .............................................................................. 48
11.14 EBI Chip Select Register .................................................................... 49
11.15 EBI Remap Control Register .............................................................. 51
11.16 EBI Memory Control Register ............................................................. 52
11.17 Abort Status Register ......................................................................... 53
11.18 Abort Address Status Register ........................................................... 54
12.1 Oscillator and Slow Clock ..................................................................... 55
12.2 Master Clock ......................................................................................... 56
12.3 Master Clock Output Controller ............................................................ 58
12.4 ARM Processor Clock Controller .......................................................... 59
12.5 Peripheral Clock Controller ................................................................... 59
12.6 PMC User Interface .............................................................................. 61
12.7 PMC System Clock Enable Register .................................................... 62
12.8 PMC System Clock Disable Register ................................................... 63
12.9 PMC System Clock Status Register ..................................................... 63
12.10 PMC Peripheral Clock Enable Register .............................................. 64
12.11 PMC Peripheral Clock Disable Register ............................................. 64
12.12 PMC Peripheral Clock Status Register ............................................... 65
12.13 PMC Clock Generator Mode Register ................................................ 66
12.14 PMC Status Register .......................................................................... 68
12.15 PMC Interrupt Enable Register ........................................................... 69
12.16 PMC Interrupt Disable Register .......................................................... 69
12.17 PMC Interrupt Mask Register ............................................................. 70
13.1 PIT: Period Interval Timer ..................................................................... 71
13.2 WDT: Watchdog Timer ......................................................................... 71
13.3 RTT: Real-time Timer ........................................................................... 72
13.4 System Timer User Interface ................................................................ 74
13.5 System Timer Control Register ............................................................ 74
1779D–ATARM–14-Apr-06