ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 31

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

4.16.4
8331A–AVR–07/11
FUSEBYTE4 – Nonolatile Memory Fuse Byte4
• Bit 6 – BOOTRST: Boot Loader Section Reset Vector
This fuse can be programmed so the reset vector is pointing to the first address in the boot
loader flash section. The device will then start executing from the boot loader flash section after
reset.
Table 4-1.
• Bit 5 – TOSCSEL: 32.768kHz Timer Oscillator Pin Selection
This fuse is used to select pin location for the 32.768kHz timer oscillator (TOSC). This fuse is
available on devices where XTAL and TOSC pins by default are shared.
Table 4-2.
Note:
• Bit 4:2 – Reserved
These fuse bits are reserved. For compatibility with future devices, always write these bits to one
when this register is written.
• Bit 1:0 – BODPD[1:0]: BOD Operation in Power-down Mode
These fuse bits set the BOD operation mode in all sleep modes except idle mode.
For details on the BOD and BOD operation modes refer to
Table 4-3.
• Bit 7:5 – Reserved
These fuse bits are reserved. For compatibility with future devices, always write these bits to one
when this register is written.
Bit
+0x04
Read/Write
Initial Value
BODPD[1:0]
BOOTRST
TOSCSEL
0
1
0
1
00
01
10
11
1. See device datasheet for alternate TOSC position.
R/W
7
–
1
Boot reset fuse.
TOSCSEL fuse.
BOD operation modes in sleep modes.
Reset Address
Reset vector = Boot loader reset
Reset vector = Application reset (address 0x0000)
Group Configuration
ALTERNATE
XTAL
Description
Reserved
BOD enabled in sampled mode
BOD enabled continuously
BOD disabled
R/W
6
–
1
(1)
R/W
5
–
1
RSTDISBL
R/W
4
1
STARTUPTIME[1:0]
R/W
3
1
Atmel AVR XMEGA AU
Description
TOSC1/2 on separate pins
TOSC1/2 shared with XTAL
R/W
2
1
”Brownout Detection” on page
WDLOCK
R/W
1
1
JTAGEN
R/W
0
0
FUSEBYTE4
113.
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