ATxmega256A3U Atmel Corporation, ATxmega256A3U Datasheet - Page 169

• Manufacturer Part Number: ATxmega256A3U
• Manufacturer: Atmel Corporation

Specifications of ATxmega256A3U

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 10
• Twi (i2c): 2
• Uart: 7
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 16
• Eeprom (bytes): 4096
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 7
• Output Compare Channels: 22
• Input Capture Channels: 22
• Pwm Channels: 22
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.6.1
14.6.2
14.6.3
14.6.4
8331A–AVR–07/11
Normal Operation
Event Action Controlled Operation
32-bit Operation
Changing the Period
In normal operation, the counter will count in the direction set by the direction (DIR) bit for each
clock until it reaches TOP or BOTTOM. When up-counting and TOP is reached, the counter will
be set to zero when the next clock is given. When down-counting, the counter is reloaded with
the period register value when BOTTOM is reached.
Figure 14-6. Normal operation.
As shown in
The write access has higher priority than count, clear, or reload, and will be immediate. The
direction of the counter can also be changed during normal operation.
Normal operation must be used when using the counter as timer base for the capture channels.
The event selection and event action settings can be used to control the counter from the event
system. For the counter, the following event actions can be selected:
Two timer/counters can be used together to enable 32-bit counter operation. By using two
timer/counters, the overflow event from one timer/counter (least-significant timer) can be routed
via the event system and used as the clock input for another timer/counter (most-significant
timer).
The counter period is changed by writing a new TOP value to the period register. If double buff-
ering is not used, any period update is immediate, as shown in
• Event system controlled up/down counting
• Event system controlled quadrature decode counting
CNT
DIR
BOTTOM
MAX
Figure
TOP
14-6, it is possible to change the counter value when the counter is running.
Atmel AVR XMEGA AU
CNT written
Figure 14-7 on page
"update"
170.
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