ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 320
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ATxmega192A3U
Manufacturer Part Number
ATxmega192A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192A3U
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega192A3U-AU
Manufacturer:
MSDS
Quantity:
124
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- Download datasheet (8Mb)
25.5
25.5.1
8331A–AVR–07/11
Register Description – AES
CTRL
–
Control Register
• Bit 7
Setting this bit starts the encryption/decryption procedure, and this bit remains set while the
encryption/decryption is ongoing. Writing this bit to zero will stop/abort any ongoing encryp-
tion/decryption process. This bit is automatically cleared if the SRIF or the ERROR flags in
STATUS are set.
• Bit 6
Setting this bit enables the auto-start mode. In auto-start mode, the START bit will trigger auto-
matically and start the encryption/decryption when all of the following conditions are met:
If all of these conditioins are not met, the encryption/decryption will be started with an incorrect
key.
• Bit 5
Setting this bit will reset the AES crypto module to its initial status on the next positive edge of
the peripheral clock. All registers, pointers, and memories in the module are set to their initial
value. When written to one, the bit stays high for one clock cycle before it is reset to zero by
hardware.
• Bit 4
This bit sets the direction for the AES crypto module. Writing this bit to zero will set the module in
encryption mode. Writing one to this bit sets the module in decryption mode.
• Bit 3
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
• Bit 2
Setting this bit enables a XOR data load to the state memory. When this bit is set, the data
loaded to the state memory are bitwise XORed with the data currently in the state memory. Writ-
ing this bit to zero disables XOR load mode, and new data written to the state memory will
overwrite the current data.
Bit
+0x00
Read/Write
Initial Value
• The AUTO bit is set before the state memory is loaded
• All memory pointers (state read/write and key read/write) are zero
• State memory is fully loaded
–
–
–
–
–
–
AUTO: Auto Start Trigger
RESET: Software Reset
DECRYPT: Decryption / Direction
Reserved
XOR: State XOR Load Enable
START: Start/Run
START
R/W
7
0
AUTO
R/W
6
0
RESET
R/W
5
0
DECRYPT
R/W
4
0
Atmel AVR XMEGA AU
R
3
–
0
XOR
R/W
2
0
R
1
–
0
R
0
–
0
CTRL
320
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