ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 147
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ATxmega192A3U
Manufacturer Part Number
ATxmega192A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192A3U
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega192A3U-AU
Manufacturer:
MSDS
Quantity:
124
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13.9
13.10 Clock and Event Output
8331A–AVR–07/11
Slew Rate Control
Figure 13-10. Port override signals and related logic.
Slew rate control can be enabled for all I/O pins individually. Enabling the slew rate limiter will
typically increase the rise/fall time by 50% to 150%, depending on operating conditions and load.
For information about the characteristics of the slew rate limiter, please refer to the device
datasheet.
It is possible to output the peripheral clock and event channel 0 events to a pin. This can be
used to clock, control, and synchronize external functions and hardware to internal device tim-
ing. The output port pin is selectable. If an event occurs, it remains visible on the port pin as long
as the event lasts; normally one peripheral clock cycle.
PINnCTRL
D
D
D
Q
OUTn
DIRn
INn
R
R
R
R
Synchronizer
Analog Input/Output
Q
Q
Q
D
Digital Input Pin
Q
OUT Override Value
OUT Override Enable
R
DIR Override Value
DIR Override Enable
D
Pull Enable
Pull Keep
Pull Direction
Digital Input Disable (DID)
Wired AND/OR
Slew Rate Limit
Inverted I/O
DID Override Value
DID Override Enable
Atmel AVR XMEGA AU
Pxn
147
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