ATxmega192A3U Atmel Corporation, ATxmega192A3U Datasheet - Page 130
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ATxmega192A3U
Manufacturer Part Number
ATxmega192A3U
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192A3U
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
10
Twi (i2c)
2
Uart
7
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
7
Output Compare Channels
22
Input Capture Channels
22
Pwm Channels
22
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega192A3U-AU
Manufacturer:
MSDS
Quantity:
124
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11.7.3
8331B–AVR–06/11
STATUS – Watchdog Status Register
The initial values of these bits are set by the watchdog window timeout period (WDWP) fuses,
and are loaded at power-on. In normal mode these bits are not in use.
In order to change these bits, the WCEN bit must be written to one at the same time. These bits
are protected by the configuration change protection mechanism. For a detailed description,
refer to
Table 11-2.
• Bit 1 – WEN: Watchdog Window Mode Enable
This bit enables the watchdog window mode. In order to change this bit, the WCEN bit in
TRL – Window Mode Control Register” on page 129
This bit is protected by the configuration change protection mechanism. For a detailed descrip-
tion, refer to
• Bit 0 – WCEN: Watchdog Window Mode Change Enable
This bit enables the ability to change the configuration of the
Register” on page
at the same time for the changes to take effect. This bit is protected by the configuration change
protection mechanism, but not protected by the WDT lock fuse.
Bit
+0x02
Read/Write
Initial Value
WPER[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
”Configuration Change Protection” on page
”Configuration Change Protection” on page
Watchdog closed window periods
R
7
–
0
129. When writing a new value to this register, this bit must be written to one
R
6
–
0
Group Configuration
R
5
–
0
128CLK
256CLK
512CLK
1KCLK
2KCLK
4KCLK
8KCLK
16CLK
32CLK
64CLK
8CLK
R
4
–
0
ATMEL CONFIDENTIAL
3
–
R
0
12.
Atmel AVR XMEGA AU
must be written to one at the same time.
12.
”WINCTRL – Window Mode Control
2
–
R
0
Typical Closed Window Periods
R
1
–
0
Reserved
Reserved
Reserved
Reserved
Reserved
0.128s
0.256s
0.512s
16ms
32ms
64ms
8ms
1.0s
2.0s
4.0s
8.0s
SYNCBUSY
R
0
0
STATUS
”WINC-
130
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