ATxmega128A4U Atmel Corporation, ATxmega128A4U Datasheet - Page 67

• Manufacturer Part Number: ATxmega128A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

5.14.10
5.14.11
5.14.12
5.14.13
8331A–AVR–07/11
SRCADDR2 – DMA Channel Source Address 2
DESTADDR0 – DMA Channel Destination Address 0
DESTADDR1 – DMA Channel Destination Address 1
DESTADDR2 – DMA Channel Destination Address 2
Reading and writing 24-bit values require special attention. For details, refer to
and 32-bit Registers” on page
• Bit 7:0 – SRCADDR[23:16]: DMA Channel Source Address 2
These bits hold byte 2 of the 24-bit source address.
DESTADDR0, DESTADDR1, and DESTADDR2 represent the 24-bit value DESTADDR, which
is the DMA channel destination address. DESTADDR2 holds the most significant byte in the reg-
ister. DESTADDR may be automatically incremented or decremented based on settings in the
DESTDIR bits in
• Bit 7:0 – DESTADDR[7:0]: DMA Channel Destination Address 0
These bits hold byte 0 of the 24-bit source address.
• Bit 7:0 – DESTADDR[15:8]: DMA Channel Destination Address 1
These bits hold byte 1 of the 24-bit source address.
Reading and writing 24-bit values require special attention. For details, refer to
and 32-bit Registers” on page
• Bit 7:0 – DESTADDR[23:16]: DMA Channel Destination Address 2
These bits hold byte 2 of the 24-bit source address.
Bit
+0x0A
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
Bit
+0x0E
Read/Write
Initial Value
Bit
+0x0D
Read/Write
Initial Value
R/W
R/W
R/W
R/W
7
0
7
0
7
0
7
0
”ADDRCTRL – DMA Channel Address Control Register” on page
R/W
R/W
R/W
R/W
6
0
6
0
6
0
6
0
12.
12.
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
DESTADDR[23:16]
R/W
R/W
R/W
SRCADDR[23:16]
DESTADDR[15:8]
4
0
4
0
DESTADDR[7:0]
4
0
4
0
R/W
R/W
R/W
R/W
3
0
Atmel AVR XMEGA AU
3
0
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
”Accessing 24-
”Accessing 24-
61.
DESTADDR2
DESTADDR1
DESTADDR0
SRCADDR2
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