ATxmega128A4U Atmel Corporation, ATxmega128A4U Datasheet - Page 244

• Manufacturer Part Number: ATxmega128A4U
• Manufacturer: Atmel Corporation

Specifications of ATxmega128A4U

• Flash (kbytes): 128 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 7
• Twi (i2c): 2
• Uart: 5
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: Yes
• Crypto Engine: AES/DES
• Sram (kbytes): 8
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 16
• Input Capture Channels: 16
• Pwm Channels: 16
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

20.10.2
20.10.3
20.11 VBUS Detection
20.12 On-Chip Debug
8331A–AVR–07/11
Bus event interrupt
Events
The bus event (BUSEVENT) interrupt is used for all interrupts that signal various types of USB
bus events or error conditions. These interrupts are related to USB bus and are generated for
the USB module and per endpoint. The following eight interrupts use the interrupt vector:
Table 20-2.
The USB module can generate several events, and these are available to the event system
allowing latency free signaling to other peripherals or for performance analysis of the USB
operation.
Table 20-3.
AVR XMEGA can use any general purpose I/O pin to implement a VBUS detection function, and
does not use a dedicated VBUS detect pin.
When a break point is reached during On-Chip Debug (OCD) sessions, the CPU clock can be
below 12MHz. If this happens, the USB module will behave as follows:
USB OCD break mode disabled: The USB module acknowledges immediately any OCD break
request. The USB module will not be able to follow up transactions received from the USB host
and its behaviour from HOST point of view is not predictable.
USB OCD break mode enabled: The USB module will acknowledge immediately any OCD break
request only if there are no ongoing USB transactions. If there is an ongoing USB transaction,
the USB module will acknowledge any OCD break request only when the ongoing USB transac-
tion has been completed. The USB module will NACK any further transactions received from the
USB host whatever they are SETUP, IN (ISO, BULK) or OUT (ISO, BULK).
Interrupt source
Start Of Frame (SOFIF)
Suspend (SUSPENDIF)
Resume (RESUMEIF)
Reset (RSTIF)
Isochronous CRC Error (CRCIF)
Underflow (UNFIF)
Overflow (OVFIF)
STALL (STALLIF)
Event source
SETUP
Start of Frame
CRC Error
Underflow/Overflow
Bus event interrupt source
Event sources
Description
A SOF token has been received
The bus has been idle for 3ms
A non-idle state is detected when the bus is suspended.
The interrupt is asynchronous and can wake the device from all
sleep modes
A reset condition has been detected on the bus
A CRC or bit-stuff error has been detected in an incoming packet
to an isochronous endpoint
An endpoint is unable to return data to the host
An endpoint is unable to accept data from the host
A STALL handshake has been returned to the host
Description
SETUPIF
SOFIF
CRCIF
UNFIF and OVFIF
Atmel AVR XMEGA AU
244