ATtiny261 Atmel Corporation, ATtiny261 Datasheet - Page 91

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ATtiny261

Manufacturer Part Number
ATtiny261
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATtiny261

Flash (kbytes)
2 Kbytes
Pin Count
20
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
4
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.12
Eeprom (bytes)
128
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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12.2.5
2588E–AVR–08/10
Definitions
TCCR1A, TCCR1B, TCCR1C, TCCR1D, OCR1A, OCR1B, OCR1C and OCR1D can be read
back right after writing the register. The read back values are delayed for the Timer/Counter1
(TCNT1) register, Timer/Counter1 High Byte Register (TC1H) and flags (OCF1A, OCF1B,
OCF1D and TOV1), because of the input and output synchronization.
The system clock frequency must be lower than half of the PCK frequency, because the syn-
chronization mechanism of the asynchronous Timer/Counter1 needs at least two edges of the
PCK when the system clock is high. If the frequency of the system clock is too high, it is a risk
that data or control values are lost.
Figure 12-2. Timer/Counter1 Synchronization Register Block Diagram.
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A, B, C or D. However, when using the register or bit
defines in a program, the precise form must be used, i.e., TCNT1 for accessing Timer/Counter1
PCKE
CK
PCK
SYNC
MODE
ASYNC
MODE
IO-registers
OCR1B
OCF1A
OCR1A
OCR1C
OCR1D
TCCR1A
TCCR1B
TCCR1C
TCCR1D
TCNT1
TC1H
OCF1B
OCF1D
TOV1
~1/2 CK Delay
1/2 CK Delay
S
A
Input synchronization
registers
OCR1A_SI
OCR1B_SI
OCR1C_SI
OCR1D_SI
TCCR1A_SI
TCCR1B_SI
TCCR1C_SI
TCCR1D_SI
TCNT1_SI
TC1H_SI
OCF1A_SI
OCF1B_SI
OCF1D_SI
TOV1_SI
1 PCK Delay
1 CK Delay
S
A
8-BIT DATABUS
Timer/Counter1
TCNT1
1 CK Delay
1 PCK Delay
Output synchronization
registers
TCNT1_SO
TC1H_SO
OCF1A_SO
OCF1B_SO
OCF1D_SO
TOV1_SO
1/2 CK Delay
~1 CK Delay
TCNT1
TC1H
OCF1A
OCF1B
OCF1D
TOV1
91

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