ATtiny167 Automotive Atmel Corporation, ATtiny167 Automotive Datasheet - Page 109
ATtiny167 Automotive
Manufacturer Part Number
ATtiny167 Automotive
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT90CAN128_AUTOMOTIVE.pdf
(225 pages)
2.ATTINY167_AUTOMOTIVE.pdf
(10 pages)
3.ATTINY167_AUTOMOTIVE.pdf
(283 pages)
Specifications of ATtiny167 Automotive
Flash (kbytes)
16 Kbytes
Pin Count
20
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
8
Hardware Qtouch Acquisition
No
Max I/o Pins
16
Ext Interrupts
16
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT90CAN128_AUTOMOTIVE PDF datasheet
- ATTINY167_AUTOMOTIVE PDF datasheet #2
- ATTINY167_AUTOMOTIVE PDF datasheet #3
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- Download datasheet (5Mb)
11.2
11.2.1
7728G–AVR–06/10
Timer/Counter1 Prescalers Register Description
General Timer/Counter Control Register – GTCCR
• Bit 7 – TSM: Timer/Counter Synchronization Mode
Writing the TSM bit to one activates the Timer/Counter Synchronization mode. In this mode,
the value that is written to the PSR0 and PSR1 bits is kept, hence keeping the corresponding
prescaler reset signals asserted. This ensures that the corresponding Timer/Counters are
halted and can be configured to the same value without the risk of one of them advancing dur-
ing configuration. When the TSM bit is written to zero, the PSR0 and PSR1 bits are cleared by
hardware, and the Timer/Counters start counting simultaneously.
• Bit 0 – PSR1: Prescaler Reset Timer/Counter1
When this bit is one, Timer/Counter1 prescaler will be reset. This bit is normally cleared imme-
diately by hardware, except if the TSM bit is set.
Bit
Read/Write
Initial Value
TSM
R
7
0
R
6
–
0
R
5
–
0
R
4
–
0
R
3
–
0
ATtiny87/ATtiny167
R
2
–
0
PSR0
R/W
1
0
PSR1
R/W
0
0
GTCCR
109
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