ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 29
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATmega8515
Manufacturer Part Number
ATmega8515
Description
Manufacturer
Atmel Corporation
Specifications of ATmega8515
Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
35
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8515
Manufacturer:
ATMEL
Quantity:
5 510
Company:
Part Number:
ATMEGA8515
Manufacturer:
NS
Quantity:
5 510
Part Number:
ATMEGA8515
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
ATmega8515-16AC
Manufacturer:
MOT
Quantity:
3 450
Part Number:
ATmega8515-16AC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega8515-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega8515-16AU
Manufacturer:
ATMEL
Quantity:
4 500
Part Number:
ATmega8515-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega8515-16PU
Manufacturer:
AT
Quantity:
20 000
XMEM Register
Description
MCU Control Register –
MCUCR
Extended MCU Control
Register – EMCUCR
2512K–AVR–01/10
Figure 16. External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 1
Note:
• Bit 7 – SRE: External SRAM/XMEM Enable
Writing SRE to one enables the External Memory Interface.The pin functions AD7:0,
A15:8, ALE, WR, and RD are activated as the alternate pin functions. The SRE bit over-
rides any pin direction settings in the respective Data Direction Registers. Writing SRE
to zero, disables the External Memory Interface and the normal pin and data direction
settings are used.
• Bit 6 – SRW10: Wait State Select Bit
For a detailed description, see common description for the SRWn bits below (EMCUCR
description).
• Bit 6..4 – SRL2, SRL1, SRL0: Wait State Sector Limit
It is possible to configure different wait states for different external memory addresses.
The External Memory address space can be divided in two sectors that have separate
wait state bits. The SRL2, SRL1, and SRL0 bits select the splitting of these sectors, see
Table 2 and Figure 11. By default, the SRL2, SRL1, and SRL0 bits are set to zero and
the entire External Memory address space is treated as one sector. When the entire
System Clock (CLK
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper
DA7:0
A15:8
CPU
ALE
WR
RD
sector) or SRW00 (lower sector)
The ALE pulse in period T7 is only present if the next instruction accesses the RAM
(internal or external).
)
Prev. Addr.
Prev. Data
Prev. Data
Prev. Data
SRE
R/W
SM0
R/W
7
0
7
0
T1
SRW10
SRL2
R/W
R/W
6
0
6
0
Address
Address
Address
T2
SRL1
R/W
R/W
SE
XX
5
0
5
0
Address
T3
SRL0
SM1
R/W
R/W
Data
Data
Data
4
0
4
0
SRW01
ISC11
R/W
R/W
T4
3
0
3
0
SRW00
ISC10
R/W
R/W
2
0
2
0
ATmega8515(L)
T5
SRW11
ISC01
R/W
R/W
1
0
1
0
T6
ISC00
ISC2
R/W
R/W
0
0
0
0
(1)
T7
EMCUCR
MCUCR
29