ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 5

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ATmega64

Manufacturer Part Number
ATmega64
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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ATmega103
Compatibility Mode
Pin Descriptions
VCC
GND
Port A (PA7..PA0)
Port B (PB7..PB0)
2490Q–AVR–06/10
By programming the M103C Fuse, the ATmega64 will be compatible with the ATmega103
regards to RAM, I/O pins and Interrupt Vectors as described above. However, some new fea-
tures in ATmega64 are not available in this compatibility mode, these features are listed below:
Digital supply voltage.
Ground.
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port A output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port A pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port A pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port A also serves the functions of various special features of the ATmega64 as listed on
73.
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega64 as listed on
74.
One USART instead of two, asynchronous mode only. Only the eight least significant bits of
the Baud Rate Register is available.
One 16 bits Timer/Counter with two compare registers instead of two 16 bits Timer/Counters
with three compare registers.
Two-wire serial interface is not supported.
Port G serves alternate functions only (not a general I/O port).
Port F serves as digital input only in addition to analog input to the ADC.
Boot Loader capabilities is not supported.
It is not possible to adjust the frequency of the internal calibrated RC Oscillator.
The External Memory Interface can not release any Address pins for general I/O, neither
configure different wait states to different External Memory Address sections.
Only EXTRF and PORF exist in the MCUCSR Register.
No timed sequence is required for Watchdog Timeout change.
Only low-level external interrupts can be used on four of the eight External Interrupt sources.
Port C is output only.
USART has no FIFO buffer, so Data OverRun comes earlier.
The user must have set unused I/O bits to 0 in ATmega103 programs.
ATmega64(L)
page
page
5

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