ATmega64 Atmel Corporation, ATmega64 Datasheet - Page 46

• Manufacturer Part Number: ATmega64
• Manufacturer: Atmel Corporation

Specifications of ATmega64

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Power
Management
and Sleep
Modes
MCUCR – MCU
Control Register
2490Q–AVR–06/10
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the six sleep modes, the SE-bit in MCUCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the MCUCR Register
select which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or
Extended Standby) will be activated by the SLEEP instruction. See
an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU is
then halted for four cycles in addition to the start-up time, it executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
Figure 18 on page 37
tion. This figure is helpful in selecting an appropriate sleep mode.
The MCU Control Register contains control bits for power management.
• Bit 5 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmers
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
• Bits 4..2 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the six available sleep modes as shown in
Table 17. Sleep Mode Select
Note:
Bit
0x35 (0x55)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode and Extended Standby mode are only available with external crystals or
resonators.
SRE
R/W
7
0
SM1
0
0
1
1
0
0
1
1
SRW10
presents the different clock systems in the ATmega64, and their distribu-
R/W
6
0
R/W
SE
5
0
SM0
0
1
0
1
0
1
0
1
SM1
R/W
4
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Extended Standby
SM0
R/W
3
0
(1)
SM2
R/W
2
0
(1)
IVSEL
R/W
1
0
Table 17
Table
ATmega64(L)
IVCE
R/W
0
0
17.
for a summary. If
MCUCR
46