ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 45

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ATmega32C1 Automotive

Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega32C1 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
6.7.6
6.7.7
7647G–AVR–09/11
Port Pins
On-chip Debug System
When entering a sleep mode, all port pins should be configured to use minimum power. The
most important is then to ensure that no pins drive resistive loads. In sleep modes where both
the I/O clock (clk
be disabled. This ensures that no power is consumed by the input logic when not needed. In
some cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section
the input buffer is enabled and the input signal is left floating or have an analog signal level
close to V
For analog input pins, the digital input buffer should be disabled at all times. An analog signal
level close to V
input buffers can be disabled by writing to the Digital Input Disable Registers (DIDR1 and
DIDR0). Refer to “Digital Input Disable Register 1– DIDR1” and “Digital Input Disable Register
0 – DIDR0” on
If the On-chip debug system is enabled by OCDEN Fuse and the chip enter sleep mode, the
main clock source is enabled, and hence, always consumes power. In the deeper sleep
modes, this will contribute significantly to the total current consumption.
CC
/2, the input buffer will use excessive power.
page 269
CC
I/O
/2 on an input pin can cause significant current even in active mode. Digital
) and the ADC clock (clk
and
page 249
“I/O-Ports” on page 62
Atmel ATmega16/32/64/M1/C1
for details.
ADC
) are stopped, the input buffers of the device will
for details on which pins are enabled. If
45

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