ATmega32C1 Automotive Atmel Corporation, ATmega32C1 Automotive Datasheet - Page 192

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ATmega32C1 Automotive

Manufacturer Part Number
ATmega32C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega32C1 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
16.10.6
16.10.7
16.10.8
192
Atmel ATmega16/32/64/M1/C1
CAN Enable Interrupt MOb Registers - CANIE2 and CANIE1
CAN Status Interrupt MOb Registers - CANSIT2 and CANSIT1
CAN Bit Timing Register 1 - CANBT1
• Bits 5:0 - IEMOB5:0: Interrupt Enable by MOb
Note:
• Bit 15:6 – Reserved Bits
These bits are reserved for future use. For compatibility with future devices, it must be written
to zero when CANIE1 & CANIE2 are written.
• Bits 5:0 - SIT5:0: Status of Interrupt by MOb
Note:
• Bit 15:6 – Reserved Bits
These bits are reserved for future use.
• Bit 7– Reserved Bit
This bit is reserved for future use. For compatibility with future devices, it must be written to
zero when CANBT1 is written.
Initial Value
Initial Value
Initial Value
Initial Value
Initial Value
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Bit
Bit
– 0 - interrupt disabled.
– 1 - MOb interrupt enabled
Bit
Bit
– 0 - no interrupt.
– 1- MOb interrupt.
Bit
Example: CANIE2 = 0000 1100
Example: CANSIT2 = 0010 0001
R/W
15
15
R
R
R
7
0
0
7
0
0
7
-
-
-
-
-
-
-
BRP5
R/W
R/W
R/W
14
14
R
R
6
0
0
6
0
0
6
0
-
-
-
-
IEMOB5
BRP4
SIT5
R/W
R/W
R/W
13
13
R
R
5
0
0
5
0
0
5
0
-
-
b
b
: enable of interrupts on MOb 2 & 3.
: MOb 0 & 5 interrupts.
IEMOB4
BRP3
SIT4
R/W
R/W
R/W
12
12
R
R
4
0
0
4
0
0
4
0
-
-
IEMOB3
BRP2
SIT3
R/W
R/W
R/W
11
11
R
R
3
0
0
3
0
0
3
0
-
-
IEMOB2
BRP1
SIT2
R/W
R/W
R/W
10
10
R
R
2
0
0
2
0
0
2
0
-
-
IEMOB1
BRP0
SIT1
R/W
R/W
R/W
R
R
1
9
0
0
1
9
0
0
1
0
-
-
IEMOB0
SIT0
R/W
R/W
R
R
0
8
0
0
0
8
0
0
0
-
-
-
-
-
7647G–AVR–09/11
CANSIT2
CANSIT1
CANBT1
CANIE2
CANIE1

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