ATmega329PA Atmel Corporation, ATmega329PA Datasheet - Page 249
ATmega329PA
Manufacturer Part Number
ATmega329PA
Description
Manufacturer
Atmel Corporation
Specifications of ATmega329PA
Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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24.5.2
8284D–AVR–6/11
LCDCRB – LCD Control and Status Register B
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
• Bit 0 – LCDBL: LCD Blanking
When this bit is written to one, the display will be blanked after completion of a frame. All seg-
ment and common pins will be driven to ground.
Note:
• Bit 7 – LCDCS: LCD Clock Select
When this bit is written to zero, the system clock is used. When this bit is written to one, the
external asynchronous clock source is used. The asynchronous clock source is either
Timer/Counter Oscillator or external clock, depending on EXCLK in ASSR. See
Operation of Timer/Counter2” on page 158
• Bit 6 – LCD2B: LCD 1/2 Bias Select
When this bit is written to zero, 1/3 bias is used. When this bit is written to one, ½ bias is used.
Refer to the LCD Manufacture for recommended bias selection.
• Bit 5:4 – LCDMUX[1:0]: LCD Mux Select
The LCDMUX[1:0] bits determine the duty cycle. Common pins that are not used are ordinary
port pins. The different duty selections are shown in
Table 24-2.
Note:
• Bits 3:0 – LCDPM[3:0]: LCD Port Mask
The LCDPM3:0 bits determine the number of port pins to be used as segment drivers. The dif-
ferent selections are shown in
port pins.
Table 24-3.
Bit
(0xE5)
Read/Write
Initial Value
LCDPM3
LCDMUX1
0
0
0
0
0
1
1
Bit 3, LCDPM3 is only available in ATmega3290A/3290PA/6490A/6490P.
1. 1/2 bias when LCD2B is written to one and 1/3 otherwise.
LCDCS
R/W
LCDPM2
LCD Duty Select
LCD Port Mask (Values in bold are only available in
ATmega3290A/3290PA/6490A/6490P)
7
0
LCDMUX0
0
0
0
0
1
0
1
LCD2B
R/W
6
0
LCDPM1
0
0
1
LCDMUX1
Table 24-3 on page
R/W
5
0
Static
Duty
1/2
1/3
1/4
LCDPM0
LCDMUX0
0
1
0
R/W
for further details.
4
0
1/2 or 1/3
1/2 or 1/3
1/2 or 1/3
Static
Bias
LCDPM3
249. Unused pins can be used as ordinary
R/W
Table 24-2 on page
I/O Port in Use as
Segment Driver
3
0
(1)
(1)
(1)
SEG0:12
SEG0:14
SEG0:16
LCDPM2
COM Pin
R/W
COM0:1
COM0:2
COM0:3
COM0
2
0
LCDPM1
R/W
1
0
249.
Maximum Number
of Segments
LCDPM0
I/O Port Pin
R/W
”Asynchronous
COM1:3
COM2:3
0
0
COM3
None
13
15
17
LCDCRB
249
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