ATmega329PA Atmel Corporation, ATmega329PA Datasheet - Page 237
ATmega329PA
Manufacturer Part Number
ATmega329PA
Description
Manufacturer
Atmel Corporation
Specifications of ATmega329PA
Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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24. LCD Controller
24.1
24.2
24.2.1
8284D–AVR–6/11
Features
Overview
Definitions
ATmega169A/PA/329A/PA/3290A/PA/649A/P/6490A/P
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The LCD Controller/driver is intended for monochrome passive liquid crystal display (LCD) with
up to four common terminals and up to 25/40 segment terminals.
A simplified block diagram of the LCD Controller/Driver is shown in
placement of I/O pins, refer to
An LCD consists of several segments (pixels or complete symbols) which can be visible or non
visible. A segment has two electrodes with liquid crystal between them. When a voltage above a
threshold voltage is applied across the liquid crystal, the segment becomes visible.
The voltage must alternate to avoid an electrophoresis effect in the liquid crystal, which
degrades the display. Hence the waveform across a segment must not have a DC-component.
The PRLCD bit in
enable the LCD module.
Several terms are used when describing LCD. The definitions in
this document.
Table 24-1.
LCD
Segment
Common
Duty
Bias
Frame Rate
Display Capacity of 25/40 Segments and Four Common Terminals
Support Static, 1/2, 1/3 and 1/4 Duty
Support Static, 1/2, 1/3 Bias
On-chip LCD Power Supply, only One External Capacitor needed
Display Possible in Power-save Mode for Low Power Consumption
Software Selectable Low Power Waveform Capability
Flexible Selection of Frame Frequency
Software Selection between System Clock or an External Asynchronous Clock Source
Equal Source and Sink Capability to maximize LCD Life Time
LCD Interrupt Can be Used for Display Data Update or Wake-up from Sleep Mode
Segment and Common Pins not Needed for Driving the Display Can be Used as Ordinary I/O Pins
Latching of Display Data gives Full Freedom in Register Update
Definitions
A passive display panel with terminals leading directly to a segment
The least viewing element (pixel) which can be on or off
Denotes how many segments are connected to a segment terminal
1/(Number of common terminals on a actual LCD display)
1/(Number of voltage levels used driving a LCD display -1)
Number of times the LCD segments is energized per second.
”PRR – Power Reduction Register” on page 46
”Pin Configurations” on page
2.
Table 24-1
Figure
must be written to zero to
are used throughout
24-1. For the actual
237
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