ATmega329PA Atmel Corporation, ATmega329PA Datasheet - Page 162
ATmega329PA
Manufacturer Part Number
ATmega329PA
Description
Manufacturer
Atmel Corporation
Specifications of ATmega329PA
Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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When OC2A is connected to the pin, the function of the COM2A[1:0] bits depends on the
WGM2[1:0] bit setting.
bits are set to a normal or CTC mode (non-PWM).
Table 18-3.
Table 18-4
PWM mode.
Table 18-4.
Note:
Table 18-5
rect PWM mode.
Table 18-5.
Note:
• Bit 2:0 – CS2[2:0]: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
18-6 on page
COM2A1
COM2A1
COM2A1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
shows the COM2[1:0] bit functionality when the WGM2[1:0] bits are set to phase cor-
pare match is ignored, but the set or clear is done at BOTTOM. See
page 153
pare match is ignored, but the set or clear is done at TOP. See
page 155
shows the COM2A[1:0] bit functionality when the WGM2[1:0] bits are set to fast
163.
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM2A0
COM2A0
COM2A0
for more details.
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 18-3
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match, set OC2A at BOTTOM
(non-inverting mode)
Set OC2A on compare match, clear OC2A at BOTTOM
(inverting mode).
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match when up-counting. Set OC2A on
compare match when counting down.
Set OC2A on compare match when up-counting. Clear OC2A on
compare match when counting down.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
shows the COM2A1:0 bit functionality when the WGM2[1:0]
(1)
(1)
”Phase Correct PWM Mode” on
”Fast PWM Mode” on
Table
162
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