ATmega328P Automotive Atmel Corporation, ATmega328P Automotive Datasheet - Page 151
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ATmega328P Automotive
Manufacturer Part Number
ATmega328P Automotive
Description
Manufacturer
Atmel Corporation
Specifications of ATmega328P Automotive
Flash (kbytes)
32 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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7810A–AVR–11/09
Table 17-4
rect PWM mode.
Table 17-4.
Note:
• Bits 5:4 – COM2B1:0: Compare Match Output B Mode
These bits control the Output Compare pin (OC2B) behavior. If one or both of the COM2B1:0
bits are set, the OC2B output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to the OC2B pin
must be set in order to enable the output driver.
When OC2B is connected to the pin, the function of the COM2B1:0 bits depends on the
WGM22:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 17-5.
Table 17-6
mode.
Table 17-6.
Note:
COM2A1
COM2B1
COM2B1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the Com-
1. A special case occurs when OCR2B equals TOP and COM2B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at TOP. See
page 144
pare Match is ignored, but the set or clear is done at BOTTOM. See
Mode” on page 144
shows the COM2A1:0 bit functionality when the WGM22:0 bits are set to phase cor-
shows the COM2B1:0 bit functionality when the WGM22:0 bits are set to fast PWM
Compare Output Mode, Phase Correct PWM Mode
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A0
COM2B0
COM2B0
for more details.
0
1
0
1
0
1
0
1
0
1
0
1
Table 17-5
Description
Normal port operation, OC2A disconnected.
WGM22 = 0: Normal Port Operation, OC2A Disconnected.
WGM22 = 1: Toggle OC2A on Compare Match.
Clear OC2A on Compare Match when up-counting. Set OC2A on
Compare Match when down-counting.
Set OC2A on Compare Match when up-counting. Clear OC2A on
Compare Match when down-counting.
Description
Normal port operation, OC2B disconnected.
Toggle OC2B on Compare Match
Clear OC2B on Compare Match
Set OC2B on Compare Match
Description
Normal port operation, OC2B disconnected.
Reserved
Clear OC2B on Compare Match, set OC2B at BOTTOM,
(non-inverting mode).
Set OC2B on Compare Match, clear OC2B at BOTTOM,
(inverting mode).
for more details.
shows the COM2B1:0 bit functionality when the WGM22:0 bits
ATmega328P [Preliminary]
(1)
(1)
“Phase Correct PWM Mode” on
“Phase Correct PWM
151
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