ATmega328P Automotive Atmel Corporation, ATmega328P Automotive Datasheet - Page 147

• Manufacturer Part Number: ATmega328P Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega328P Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 23
• Ext Interrupts: 24
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

17.9
7810A–AVR–11/09
Asynchronous Operation of Timer/Counter2
Figure 17-10. Timer/Counter Timing Diagram, Setting of OCF2A, with Prescaler (f
Figure 17-11
Figure 17-11. Timer/Counter Timing Diagram, Clear Timer on Compare Match mode, with Pres-
When Timer/Counter2 operates asynchronously, some considerations must be taken.
• Warning: When switching between asynchronous and synchronous clocking of
• The CPU main clock frequency must be more than four times the Oscillator frequency.
• When writing to one of the registers TCNT2, OCR2x, or TCCR2x, the value is transferred to a
• When entering Power-save or ADC Noise Reduction mode after having written to TCNT2,
Timer/Counter2, the Timer Registers TCNT2, OCR2x, and TCCR2x might be corrupted. A safe
procedure for switching clock source is:
temporary register, and latched after two positive edges on TOSC1. The user should not write
a new value before the contents of the temporary register have been transferred to its
destination. Each of the five mentioned registers have their individual temporary register, which
means that e.g. writing to TCNT2 does not disturb an OCR2x write in progress. To detect that a
transfer to the destination register has taken place, the Asynchronous Status Register – ASSR
has been implemented.
OCR2x, or TCCR2x, the user must wait until the written register has been updated if
a. Disable the Timer/Counter2 interrupts by clearing OCIE2x and TOIE2.
b. Select clock source by setting AS2 as appropriate.
c. Write new values to TCNT2, OCR2x, and TCCR2x.
d. To switch to asynchronous operation: Wait for TCN2xUB, OCR2xUB, and TCR2xUB.
e. Clear the Timer/Counter2 Interrupt Flags.
f.
TCNTn
TCNTn
(clk
(clk
OCRnx
OCRnx
OCFnx
(CTC)
OCFnx
clk
clk
clk
clk
Enable interrupts, if needed.
I/O
I/O
I/O
I/O
Tn
Tn
/8)
/8)
shows the setting of OCF2A and the clearing of TCNT2 in CTC mode.
caler (f
clk_I/O
OCRnx - 1
TOP - 1
/8)
TOP
OCRnx
ATmega328P [Preliminary]
OCRnx Value
TOP
BOTTOM
OCRnx + 1
BOTTOM + 1
OCRnx + 2
clk_I/O
/8)
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