ATMEGA328P/V ATMEL [ATMEL Corporation], ATMEGA328P/V Datasheet

no-image

ATMEGA328P/V

Manufacturer Part Number
ATMEGA328P/V
Description
8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
High Performance, Low Power AVR
Advanced RISC Architecture
Non-volatile Program and Data Memories
Peripheral Features
Special Microcontroller Features
I/O and Packages
Operating Voltage:
Temperature Range:
Speed Grade:
Low Power Consumption
– 131 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
– 4/8/16/32K Bytes of In-System Self-Programmable Flash
– Optional Boot Code Section with Independent Lock Bits
– 256/512/512/1K Bytes EEPROM (ATmega48P/88P/168P/328P)
– 512/1K/1K/2K Byte Internal SRAM (ATmega48P/88P/168P/328P)
– Programming Lock for Software Security
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel 10-bit ADC in TQFP and QFN/MLF package
– 6-channel 10-bit ADC in PDIP Package
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Byte-oriented 2-wire Serial Interface (Philips I
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
– 23 Programmable I/O Lines
– 28-pin PDIP, 32-lead TQFP, 28-pad QFN/MLF and 32-pad QFN/MLF
– 1.8 - 5.5V for ATmega48PV/88PV/168PV/328PV
– 2.7 - 5.5V for ATmega48P/88P/168P/328P
– -40
– ATmega48PV/88PV/168PV/328PV: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 10 MHz @ 2.7 - 5.5V
– ATmega48P/88P/168P/328P: 0 - 10 MHz @ 2.7 - 5.5V, 0 - 20 MHz @ 4.5 - 5.5V
– Active Mode:
– Power-down Mode:
(ATmega48P/88P/168P/328P)
Mode
and Extended Standby
Endurance: 10,000 Write/Erase Cycles
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
Endurance: 100,000 Write/Erase Cycles
Temperature Measurement
Temperature Measurement
1 MHz, 1.8V: TBD µA
32 kHz, 1.8V: TBD µA (including Oscillator)
TBD µA at 1.8V
°
C to 85
°
C
®
8-Bit Microcontroller
2
C compatible)
8-bit
Microcontroller
with 4/8/16/32K
Bytes In-System
Programmable
Flash
ATmega48P/V
ATmega88P/V
ATmega168P/V
ATmega328P/V
Preliminary
Rev. 8025AS–AVR–07/07

Related parts for ATMEGA328P/V

ATMEGA328P/V Summary of contents

Page 1

... Low Power Consumption – Active Mode: 1 MHz, 1.8V: TBD µA 32 kHz, 1.8V: TBD µA (including Oscillator) – Power-down Mode: TBD µA at 1.8V ® 8-Bit Microcontroller 2 C compatible) 8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash ATmega48P/V ATmega88P/V ATmega168P/V ATmega328P/V Preliminary Rev. 8025AS–AVR–07/07 ...

Page 2

Pin Configurations Figure 1-1. Pinout ATmega48P/88P/168P/328P TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 ...

Page 3

Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive ...

Page 4

The various special features of Port D are elaborated in 89. 1.1 the supply voltage pin for the A/D Converter, PC3:0, and ADC7:6. It should be externally CC connected to V through a low-pass filter. Note ...

Page 5

Overview The ATmega48P/88P/168P/328P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48P/88P/168P/328P achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

Page 6

CISC microcontrollers. The ATmega48P/88P/168P/328P provides the following features: 4K/8K/16K/32K bytes of In- System Programmable Flash with Read-While-Write capabilities, 256/512/512/1K bytes EEPROM, 512/1K/1K/2K bytes SRAM, ...

Page 7

... Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 8025AS–AVR–07/07 ATmega48P/88P/168P/328P 7 ...

Page 8

Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...

Page 9

Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) OCR2B (0xB3) OCR2A (0xB2) ...

Page 10

Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...

Page 11

Address Name Bit 7 0x1B (0x3B) PCIFR – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – ...

Page 12

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 13

Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...

Page 14

Mnemonics Operands POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break Note: 1. These instructions are only available in ATmega168P. ATmega48P/88P/168P/328P 14 Description Rd ← STACK (see specific descr. for ...

Page 15

Ordering Information 6.1 ATmega48P Speed (MHz) Power Supply (3) 10 1.8 - 5.5 (3) 20 2.7 - 5.5 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering ...

Page 16

ATmega88P Speed (MHz) Power Supply (3) 10 1.8 - 5.5 (3) 20 2.7 - 5.5 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum ...

Page 17

ATmega168P (3) Speed (MHz) Power Supply 10 1.8 - 5.5 20 2.7 - 5.5 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

Page 18

ATmega328P (3) Speed (MHz) Power Supply 10 1.8 - 5.5 20 2.7 - 5.5 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. ...

Page 19

Packaging Information 7.1 32A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

Page 20

Pin TOP VIEW 0.20 b BOTTOM VIEW The terminal # Laser-marked Feature. Note: 2325 Orchard Parkway San Jose, CA 95131 R ATmega48P/88P/168P/328P 20 E 0.45 1 ...

Page 21

Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 22

A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R ATmega48P/88P/168P/328P ...

Page 23

Errata 8.1 Errata ATmega48P The revision letter in this section refers to the revision of the ATmega48P device. 8.1.1 Rev known errata. 8.1.2 Rev. A Not Sampled. 8.2 Errata ATmega88P The revision letter in this section refers ...

Page 24

Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 9.1 Rev. 2545A-07/07 1. ATmega48P/88P/168P/328P 24 Initial revision. 8025AS–AVR–07/07 ...

Page 25

Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...

Related keywords