AT90PWM2B Atmel Corporation, AT90PWM2B Datasheet - Page 166

• Manufacturer Part Number: AT90PWM2B
• Manufacturer: Atmel Corporation

Specifications of AT90PWM2B

• Flash (kbytes): 8 Kbytes
• Pin Count: 24
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 19
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 12
• Input Capture Channels: 1
• Pwm Channels: 7
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

16.25.13 PSC 2 Control Register – PCTL2
166
AT90PWM2/3/2B/3B
• Bit 7:6 – PPRE11:0 : PSC 1 Prescaler Select
This two bits select the PSC input clock division factor.All generated waveform will be modified
by this factor.
Table 16-15. PSC 1 Prescaler Selection
• Bit 5 – PBFM1 : Balance Flank Width Modulation
When this bit is clear, Flank Width Modulation operates on On-Time 1 only.
When this bit is set, Flank Width Modulation operates on On-Time 0 and On-Time 1.
• Bit 4 – PAOC1B : PSC 1 Asynchronous Output Control B
When this bit is set, Fault input selected to block B can act directly to PSCOUT11 output. See
Section “PSC Clock Sources”, page 159
• Bit 3 – PAOC1A : PSC 1 Asynchronous Output Control A
When this bit is set, Fault input selected to block A can act directly to PSCOUT10 output. See
Section “PSC Clock Sources”, page 159
• Bit 2 – PARUN1 : PSC 1 Autorun
When this bit is set, the PSC 1 starts with PSC0. That means that PSC 1 starts :
•
•
Thanks to this bit, 2 or 3 PSCs can be synchronized (motor control for example)
• Bit 1 – PCCYC1 : PSC 1 Complete Cycle
When this bit is set, the PSC 1 completes the entire waveform cycle before halt operation
requested by clearing PRUN1. This bit is not relevant in slave mode (PARUN1 = 1).
• Bit 0 – PRUN1 : PSC 1 Run
Writing this bit to one starts the PSC 1.
When set, this bit prevails over PARUN1 bit.
Bit
Read/Write
Initial Value
PPRE11
0
0
1
1
when PRUN0 bit in PCTL0 register is set,
or when PARUN0 bit in PCTL0 is set and PRUN2 bit in PCTL2 register is set.
PPRE10
0
1
0
1
PPRE21
R/W
7
0
PPRE20
R/W
6
0
Description PWM2/3
No divider on PSC input clock
Divide the PSC input clock by 4
Divide the PSC input clock by 16
Divide the PSC clock by 64
PBFM2
R/W
5
0
PAOC2B
R/W
4
0
PAOC2A
R/W
3
0
PARUN2
R/W
2
0
Description PWM2B/3B
No divider on PSC input clock
Divide the PSC input clock by 4
Divide the PSC input clock by 32
Divide the PSC clock by 256
PCCYC2
R/W
1
0
PRUN2
R/W
0
0
4317J–AVR–08/10
PCTL2