AT89LP51ID2 Atmel Corporation, AT89LP51ID2 Datasheet - Page 197

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AT89LP51ID2

Manufacturer Part Number
AT89LP51ID2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89LP51ID2

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
42
Spi
1
Twi (i2c)
1
Uart
1
Adc Channels
7
Adc Resolution (bits)
10
Adc Speed (ksps)
153.8
Sram (kbytes)
2.25
Eeprom (bytes)
4096
Self Program Memory
API
Operating Voltage (vcc)
2.4 to 5.5
Timers
4
Isp
SPI/OCD/UART
Watchdog
Yes

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24.4.2.6
3714A–MICRO–7/11
Programming the User Signature Space
Figure 24-3. Flash Page Buffer Loading Procedure
Note:
The following procedure is used to program the User Signature space and is summarized in
ure
1. Load up to one half-page of data in the page buffer from address 0000H to 01FFH
2. Save then disable the interrupts (EA = 0)
3. Launch the programming by writing the data sequence 52H followed by A2H to FCON
4. If launched from internal memory, the CPU idles until programming completes. If
5. Restore the interrupts (EA = 1)
24-4:
register.
launched from external memory, poll the FBUSY flag until it is cleared
The last page address used when loading the page buffer is the one used to select the page pro-
gramming address.
AT89LP51RD2/ED2/ID2 Preliminary
Data memory Mapping
FCON = 00h (FPS = 0)
Exec: MOVX @DPTR, A
Page Buffer Mapping
FCON = 08h (FPS=1)
Flash Page Buffer
Save and Disable IT
DPTR = Address
ACC = Data
Last Byte
Data Load
to load?
Restore IT
Loading
EA = 0
Fig-
197

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