AT89C5131A-M Atmel Corporation, AT89C5131A-M Datasheet - Page 27
AT89C5131A-M
Manufacturer Part Number
AT89C5131A-M
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT89C5130A-M.pdf
(188 pages)
2.AT89C5130A-M.pdf
(4 pages)
3.AT89C5130A-M.pdf
(34 pages)
Specifications of AT89C5131A-M
Flash (kbytes)
32 Kbytes
Max. Operating Frequency
48 MHz
Cpu
8051-12C
Max I/o Pins
34
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
1.25
Eeprom (bytes)
1024
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART/USB
Watchdog
Yes
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7. Dual Data Pointer Register
Figure 7-1.
4337K–USB–04/08
7
Use of Dual Pointer
AUXR1(A2H)
The additional data pointer can be used to speed up code execution and reduce code size.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called DPS = AUXR1.0 (see Table 7-1) that allows the program code to switch
between them (see Figure 7-1).
Table 7-1.
Reset Value = XX[BLJB]X X0X0b
Not bit addressable
a. Bit 2 stuck at 0; this allows to use INC AUXR1 to toggle DPS without changing GF3.
DPS
0
Number
Bit
7
6
5
4
3
2
1
0
7
-
AUXR1 Register
AUXR1- Auxiliary Register 1(0A2h)
Mnemonic
DPH(83H) DPL(82H)
ENBOOT
DPS
GF3
Bit
0
-
-
-
-
6
-
DPTR1
Description
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Enable Boot Flash
Cleared to disable boot ROM.
Set to map the boot ROM between F800h - 0FFFFh.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
This bit is a general-purpose user flag.
Always cleared.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Data Pointer Selection
Cleared to select DPTR0.
Set to select DPTR1.
ENBOOT
DPTR0
5
4
-
GF3
3
AT89C5130A/31A-M
External Data Memory
2
0
1
-
DPS
0
27
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