AT32UC3C064C Atmel Corporation, AT32UC3C064C Datasheet - Page 367

• Manufacturer Part Number: AT32UC3C064C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C064C

• Flash (kbytes): 64 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 123
• Ext Interrupts: 144
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 20
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 20
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

• LPCB: Low Power Configuration Bits
32117C–AVR-08/11
LPCB
0
1
2
3
Low Power Configuration
Low power feature is inhibited: no power-down, self refresh or deep power-down command is issued to
the SDRAM device.
The SDRAMC issues a self refresh command to the SDRAM device, the SDCLK clock is deactivated and
the SDCKE signal is set low. The SDRAM device leaves the self refresh mode when accessed and
enters it after the access.
The SDRAMC issues a power-down command to the SDRAM device after each access, the SDCKE
signal is set to low. The SDRAM device leaves the power-down mode when accessed and enters it after
the access.
The SDRAMC issues a deep power-down command to the SDRAM device. This mode is unique to low-
power SDRAM.
AT32UC3C
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