AT32UC3A3128S Atmel Corporation, AT32UC3A3128S Datasheet - Page 894
AT32UC3A3128S
Manufacturer Part Number
AT32UC3A3128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3128S
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 894 of 1012
- Download datasheet (16Mb)
• SMOD: Start Mode
• PROCDLY: Processing Delay
• CIPHER: Processing Mode
32072G–11/2011
SMOD
The processing time represents the number of clock cycles that the AES needs in order to perform one encryption/decryption
with no countermeasures activated:
The best performance is achieved with PROCDLY equal to 0.
Writing a value to this field will update the processing time.
Reading this field will give the current processing delay.
0: Decrypts data is enabled.
1: Encrypts data is enabled.
0
1
2
3
Description
Manual mode
Automatic mode
DMA mode
Reserved
• LOD = 0: The encrypted/decrypted data are available at the address specified in the
• LOD = 1: The encrypted/decrypted data are available in the ODATAnR registers.
configuration of DMA Controller.
Processing Time
=
12
×
(
PROCDLY
+
1
)
894
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