AT32UC3A3128S Atmel Corporation, AT32UC3A3128S Datasheet - Page 356
AT32UC3A3128S
Manufacturer Part Number
AT32UC3A3128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3128S
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 356 of 1012
- Download datasheet (16Mb)
19.12.5
Name:
Access Type:
Offset:
Reset Value:
• DONE: Done Bit
Software can poll this bit to see when a block transfer is complete
• BLOCK_TS: Block Transfer Size
When the DMACA is flow controller, this field is written by the user before the channel is enabled to indicate the block size.
The number programmed into BLOCK_TS indicates the total number of single transactions to perform for every block
transfer, unless the transfer is already in progress, in which case the value of BLOCK_TS indicates the number of single
transactions that have been performed so far.
The width of the single transaction is determined by CTLx.SRC_TR_WIDTH.
32072G–11/2011
31
23
15
7
-
-
-
Control Register for Channel x High
30
22
14
6
-
-
-
CTLxH
Read/Write
0x01C + [x * 0x58]
0x00000002
29
21
13
5
-
-
-
DONE
28
20
12
4
-
-
BLOCK_TS[7:0]
27
19
11
3
-
-
26
18
10
2
-
-
BLOCK_TS[11:8]
25
17
9
1
-
-
24
16
8
0
-
-
356
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