AT32UC3A3128S Atmel Corporation, AT32UC3A3128S Datasheet - Page 475
AT32UC3A3128S
Manufacturer Part Number
AT32UC3A3128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3128S
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A3128 PDF datasheet #4
- AT32UC3A3128 PDF datasheet #5
- Current page: 475 of 1012
- Download datasheet (16Mb)
23.5
23.6
Table 23-4.
23.7
23.7.1
23.7.2
32072G–11/2011
Pin Name
TWD
TWCK
TWALM
Application Block Diagram
I/O Lines Description
Product Dependencies
I/O Lines
Power Management
I/O Lines Description
Figure 23-2. Application Block Diagram
In order to use this module, other parts of the system must be configured correctly, as described
below.
TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWALM is used to implement the optional SMBus SMBALERT signal.
The TWALM, TWD, and TWCK pins may be multiplexed with I/O Controller lines. To enable the
TWIM, the user must perform the following steps:
If the CPU enters a sleep mode that disables clocks used by the TWIM, the TWIM will stop func-
tioning and resume operation after the system wakes up from sleep mode.
• Program the I/O Controller to:
Rp: pull-up value as given by the I2C Standard
Master
TWI
– Dedicate TWD, TWCK, and optionally TWALM as peripheral lines.
– Define TWD, TWCK, and optionally TWALM as open-drain.
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
SMBus SMBALERT
TWD
TWCK
TWALM
serial EEPROM
Atmel TWI
Slave 1
Figure 23-4 on page
I
Slave 2
2
C RTC
controller
I
Slave 3
2
C LCD
477). When the bus is free, both lines are
I
2
Slave 4
sensor
C temp
Rp
Rp
VDD
Rp
Input/Output
Input/Output
Input/Output
Type
475
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