AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 692

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

• AUTOSW: Automatic Switch
• EPDIR: Endpoint Direction
• EPSIZE: Endpoint Size
• EPBK: Endpoint Banks
• ALLOC: Endpoint Memory Allocate
32072G–11/2011
0
0
0
0
1
1
1
This bit is cleared upon receiving a USB reset.
1: The automatic bank switching is enabled.
0: The automatic bank switching is disabled.
This bit is cleared upon receiving a USB reset.
1: The endpoint direction is IN (nor for control endpoints).
0: The endpoint direction is OUT.
This field shall be written to select the size of each endpoint bank. The maximum size of each endpoint is specified in
1 on page 617
This field is cleared upon receiving a USB reset (except for the endpoint 0).
This field shall be written to select the number of banks for the endpoint:
For control endpoints, a single-bank endpoint (0b00) shall be selected.
This field is cleared upon receiving a USB reset (except for the endpoint 0).
Writing a one to this bit will allocate the endpoint memory. The user should check the CFGOK bit to know whether the allocation
of this endpoint is correct.
Writing a zero to this bit will free the endpoint memory.
This bit is cleared upon receiving a USB reset (except for the endpoint 0).
0
0
1
1
EPSIZE
EPBK
0
0
1
1
0
0
1
.
0
1
0
1
0
1
0
1
0
1
0
Endpoint Size
8 bytes
16 bytes
32 bytes
64 bytes
128 bytes
256 bytes
512 bytes
Endpoint Banks
1 (single-bank endpoint)
2 (double-bank endpoint)
3 (triple-bank endpoint) if supported
Reserved
(see
Table 26-1 on page
617).
Table 26-
692