AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 617

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AT32UC3A3128

Manufacturer Part Number
AT32UC3A3128
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A3128

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11
26. Hi-Speed USB Interface (USBB)
26.1
26.2
Table 26-1.
32072G–11/2011
Pipe/Endpoint
Features
Overview
0
1
2
3
4
5
6
7
Description of USB Pipes/Endpoints
Mnemonic
Rev: 3.2.0.17
The Universal Serial Bus (USB) MCU device complies with the Universal Serial Bus (USB) 2.0
specification, in all speeds.
Each pipe/endpoint can be configured in one of several transfer types. It can be associated with
one or more banks of a dual-port RAM (DPRAM) used to store the current data payload. If sev-
eral banks are used (“ping-pong” mode), then one DPRAM bank is read or written by the CPU or
the DMA while the other is read or written by the USBB core. This feature is mandatory for iso-
chronous pipes/endpoints.
Table 26-1 on page 617
PEP0
PEP1
PEP2
PEP3
PEP4
PEP5
PEP6
PEP7
The theoretical maximal pipe/endpoint configuration (3648bytes) exceeds the real DPRAM size
(2368bytes). The user needs to be aware of this when configuring pipes/endpoints. To fully use
the 2368bytes of DPRAM, the user could for example use the configuration described
26-2 on page 617
Table 26-2.
Compatible with the USB 2.0 specification
Supports High (480Mbit/s), Full (12Mbit/s) and Low (1.5Mbit/s) speed Device and Embedded Host
eight pipes/endpoints
2368bytes of Embedded Dual-Port RAM (DPRAM) for Pipes/Endpoints
Up to 2 memory banks per Pipe/Endpoint (Not for Control Pipe/Endpoint)
Flexible Pipe/Endpoint configuration and management with dedicated DMA channels
On-Chip UTMI transceiver including Pull-Ups/Pull-downs
On-Chip pad including VBUS analog comparator
Pipe/Endpoint
0
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Max. Size
512 bytes
512 bytes
512 bytes
512 bytes
512 bytes
512 bytes
512 bytes
.
64 bytes
Mnemonic
describes the hardware configuration of the USB MCU device.
PEP0
Max. Nb. Banks
1
2
2
2
2
2
2
2
64 bytes
Size
DMA
N
Y
Y
Y
Y
Y
Y
Y
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Isochronous/Bulk/Interrupt/Control
Nb. Banks
Isochronous/Bulk/Interrupt
1
Control
Type
inTable
617

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