NM24C16FEM8X Fairchild Semiconductor, NM24C16FEM8X Datasheet
NM24C16FEM8X
Available stocks
Related parts for NM24C16FEM8X
NM24C16FEM8X Summary of contents
Page 1
... WP START SDA STOP LOGIC SLAVE ADDRESS SCL © 1998 Fairchild Semiconductor Corporation NM24C16/17 Rev Extended operating voltage 2.7V – 5.5V I 400 KHz clock frequency (F) at 2.7V - 5.5V I 200µA active current typical 10µA standby current typical 1µA standby current typical (L) 0.1µA standby current typical (LZ) ...
Page 2
NM24C16 Ground SS SDA Serial Data I/O SCL Serial Clock Input NC No Connection V Power Supply NM24C17 ...
Page 3
NM24C16/17 Rev XXX Letter Description N 8-pin DIP M8 8-pin SOIC MT8 8-pin TSSOP None 0 to 70°C V -40 to +125°C E -40 to +85°C Blank 4.5V to 5.5V L 2.7V ...
Page 4
Ambient Storage Temperature All Input or Output Voltages with Respect to Ground Lead Temperature (Soldering, 10 seconds) ESD Rating I Active Power Supply Current f CCA I Standby Current SB I Input Leakage Current LI I Output Leakage Current LO ...
Page 5
Input Pulse Levels V CC Input Rise and Fall Times 10 ns Input & Output Timing Levels V CC Output Load 1 TTL Gate and C f SCL Clock Frequency SCL T Noise Suppression Time Constant at I SCL, SDA ...
Page 6
SCL SDA 8th BIT WORD n The write cycle time ( the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. WR SDA SCL Master Transmitter/ Receiver Due to ...
Page 7
IIC bus allows synchronous bi-directional communication be- tween a TRANSMITTER and a RECEIVER using a Clock signal (SCL) and a Data signal (SDA). Additionally there are up to three Address signals (A2, A1 and A0) which collectively serve as "chip ...
Page 8
The SCL input is used to clock all data into and out of the device. SDA is a bi-directional pin used to transfer data into and out of the device open drain output and may be wire–ORed ...
Page 9
SCL SDA SCL SDA START CONDITION SCL FROM MASTER DATA OUTPUT FROM TRANSMITTER DATA OUTPUT FROM RECEIVER START CONDITION NM24C16/17 Rev. G DATA STABLE DATA CHANGE CONDITION DS500072-11 STOP DS500072- ACKNOWLEDGE PULSE DS500072-13 ...
Page 10
The NM24C16/17 device will always respond with an acknowl- edge after recognition of a start condition and its slave address. If both the device and a write operation have been selected, the NM24C16/17 will respond with an acknowledge after the ...
Page 11
For a write operation a second address field is required which is a word address that is comprised of eight bits and provides access to any one of the 256 bytes in the selected page of memory. Upon receipt of ...
Page 12
Read operations are initiated in the same manner as write operations, with the exception that the R/W bit of the slave address is set to a one. There are three basic read operations: current address read, random read, and sequential ...
Page 13
All lead tips Typ. All Leads 0.114 - 0.122 (2.90 - 3.10) 8 ...
Page 14
... Fairchild's products are not authorized for use as critical components in life support devices or systems without the express written approval of the President of Fairchild Semiconductor Corporation. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support ...