SC16C752IB48,157 NXP Semiconductors, SC16C752IB48,157 Datasheet - Page 7

• Manufacturer Part Number: SC16C752IB48,157
• Description: IC DUAL UART 64BYTE 48LQFP
• Manufacturer: NXP Semiconductors

Specifications of SC16C752IB48,157

• Number Of Channels: 2, DUART
• Fifo's: 64 Byte
• Voltage - Supply: 2.5V, 3.3V, 5V
• With Auto Flow Control: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935270055157; SC16C752IB48; SC16C752IB48

Philips Semiconductors
9397 750 11635
Product data
Fig 3. Autoflow control (Auto-RTS and Auto-CTS) example.
D7-D0
6.1 Trigger levels
6.2 Hardware flow control
FIFO
FIFO
RX
TX
The SC16C752 has selectable hardware flow control and software flow control.
Hardware flow control significantly reduces software overhead and increases system
efficiency by automatically controlling serial data flow using the RTS output and CTS
input signals. Software flow control automatically controls data flow by using
programmable Xon/Xoff characters.
The UART includes a programmable baud rate generator that can divide the timing
reference clock input by a divisor between 1 and (2
The SC16C752 provides independent selectable and programmable trigger levels for
both receiver and transmitter DMA and interrupt generation. After reset, both
transmitter and receiver FIFOs are disabled and so, in effect, the trigger level is the
default value of one byte. The selectable trigger levels are available via the FCR. The
programmable trigger levels are available via the TLR.
Hardware flow control is comprised of Auto-CTS and Auto-RTS. Auto-CTS and
Auto-RTS can be enabled/disabled independently by programming EFR[7:6].
With Auto-CTS, CTS must be active before the UART can transmit data.
Auto-RTS only activates the RTS output when there is enough room in the FIFO to
receive data and de-activates the RTS output when the RX FIFO is sufficiently full.
The halt and resume trigger levels in the TCR determine the levels at which RTS is
activated/deactivated.
If both Auto-CTS and Auto-RTS are enabled, when RTS is connected to CTS, data
transmission does not occur unless the receiver FIFO has empty space. Thus,
overrun errors are eliminated during hardware flow control. If not enabled, overrun
errors occur if the transmit data rate exceeds the receive FIFO servicing latency.
UART 1
SERIAL-TO-
PARALLEL
PARALLEL-
TO-SERIAL
CONTROL
CONTROL
FLOW
FLOW
Rev. 04 — 20 June 2003
RTS
CTS
RX
TX
TX
CTS
RX
RTS
PARALLEL-
TO-SERIAL
SERIAL-TO-
PARALLEL
CONTROL
CONTROL
FLOW
FLOW
UART 2
16
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Dual UART with 64-byte FIFO
1).
FIFO
FIFO
RX
TX
SC16C752
002aaa228
D7-D0
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