SC68C652BIB48,151 NXP Semiconductors, SC68C652BIB48,151 Datasheet - Page 4
![IC UART DUAL W/FIFO 48-LQFP](/photos/6/64/66484/568-48-lqfp_sot313-2_sml.jpg)
SC68C652BIB48,151
Manufacturer Part Number
SC68C652BIB48,151
Description
IC UART DUAL W/FIFO 48-LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.SC68C652BIB48151.pdf
(43 pages)
Specifications of SC68C652BIB48,151
Features
2 Channels
Number Of Channels
2, DUART
Fifo's
32 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
48-LQFP
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
LQFP
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
48
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-3297
935278766151
SC68C652BIB48-S
935278766151
SC68C652BIB48-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC68C652BIB48,151
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
5. Pinning information
SC68C652B_2
Product data sheet
5.1 Pinning
5.2 Pin description
Table 2.
Symbol
A0
A1
A2
A3
CDA
CDB
CS
Fig 2.
Pin configuration for LQFP48
Pin description
Pin
28
27
26
11
40
16
10
TXRDYB
OP2B
RXB
RXA
TXA
TXB
n.c.
CS
D5
D6
D7
A3
Type
I
I
I
I
I
I
I
Rev. 02 — 2 November 2009
10
11
12
1
2
3
4
5
6
7
8
9
Dual UART with 32-byte FIFOs and IrDA encoder/decoder
Description
Address 0 select bit. Internal registers address selection.
Address 1 select bit. Internal registers address selection.
Address 2 select bit. Internal registers address selection.
Address 3 select bit. A3 is used to select Channel A or
Channel B. A logic LOW selects Channel A, and a logic HIGH
selects Channel B. (See
Carrier Detect (active LOW). These inputs are associated with
individual UART channels A and B. A logic 0 on these pins
indicates that a carrier has been detected by the modem for that
channel.
Chip Select (active LOW). This pin enables data transfers
between the user CPU and the SC68C652B for the channel(s)
addressed. Individual UART sections (A, B) are addressed by A3.
See
Table
SC68C652BIB48
3.
Table
3.)
002aab324
36
35
34
33
32
31
30
29
28
27
26
25
SC68C652B
RESET
DTRB
DTRA
RTSA
OP2A
RXRDYA
IRQ
n.c.
A0
A1
A2
n.c.
© NXP B.V. 2009. All rights reserved.
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