571BJC000107DG Silicon Laboratories Inc, 571BJC000107DG Datasheet - Page 24

• Manufacturer Part Number: 571BJC000107DG
• Manufacturer: Silicon Laboratories Inc

Specifications of 571BJC000107DG

• Lead Free Status / Rohs Status: Compliant

Si570/Si571
7. Ordering Information
The Si570/Si571 supports a wide variety of options including frequency range, start-up frequency, temperature
stability, tuning slope, output format, and V
at time of shipment. Configurations are specified using the Part Number Configuration chart shown below. Silicon
Labs provides a web browser-based part number configuration utility to simplify this process. Refer to
www.silabs.com/VCXOPartNumber
VCXO series is supplied in an industry-standard, RoHS compliant, 8-pad, 5 x 7 mm package. Tape and reel
packaging is an ordering option.
24
A
B
C
D
E
F
G
H
J
K
M
N
P
Q
R
S
T
U
V
W
Note:
CMOS available to 160 MHz.
V
3.3
3.3
3.3
3.3
2.5
2.5
2.5
2.5
1.8
1.8
3.3
3.3
3.3
3.3
2.5
2.5
2.5
2.5
1.8
1.8
DD
VCXO Product Family
Output Format Output Enable Polarity
LVPECL
LVDS
CMOS
CML
LVPECL
LVDS
CMOS
CML
CMOS
CML
LVPECL
LVDS
CMOS
CML
LVPECL
LVDS
CMOS
CML
CMOS
CML
570 Programmable
571 Programmable
XO Product Family
1
st
57x
Option Code
High
High
High
High
High
High
High
High
High
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
X
to access this tool and for further ordering instructions. The Si570/Si571 XO/
Figure 6. Part Number Convention
X
DD
Si571
Si570
. Specific device configurations are programmed into the Si570/Si571
3
Frequency Grade
Code
rd
A
B
C
Option Code
X
Code
Notes:
1. For best jitter and phase noise performance, always choose the smallest Kv that meets
2. APR is the ability of a VCXO to track a signal over the product lifetime. A VCXO with an
3. Nominal Pull range (±) = 0.5 x V
4. Nominal Absolute Pull Range (±APR) = Pull range – stability – lifetime aging
5. Minimum APR values noted above include worst case values for all parameters.
6. Combination not available.
Code Temperature Stability (ppm, max, ±)
A
B
C
D
E
F
G
H
J
K
M
the application’s minimum APR requirements. Unlike SAW-based solutions which
require higher higher Kv values to account for their higher temperature dependence,
the Si55x series provides lower Kv options to minimize noise coupling and jitter in real-
world PLL designs. See AN255 and AN266 for more information.
APR of ±25 ppm is able to lock to a clock with a ±25 ppm stability over 15 years over all
operating conditions.
A
B
Rev. 1.2
10-280 (CMOS available to 160 MHz)
XXX XXX
10-945, 970-1134, 1213-1417.5
10-810
Temperature
± ppm (max)
Frequency Range Supported (MHz)
Six-Digit Start-up Frequency/I
The Si57x supports a user-defined start-up frequency within the following
bands of frequencies: 10–945 MHz, 970–1134 MHz, and 1213–1417 MHz.
The start-up frequency must be in the same frequency range as that
specified by the Frequency Grade 3
The Si57x supports a user-defined I
frequency/I
This code can be requested during the part number request process. Refer
to www.silabs.com/VCXOPartNumber to request an Si57x part number.
Stability
100
100
20
100
20
20
20
50
50
20
50
2
C address combination is assigned a six-digit numerical code.
50
20
Tuning Slope
ppm/V (typ)
D
180
135
180
180
135
356
356
Kv
33
90
90
45
= 0.5 x V
DD
2
2
x tuning slope.
nd
nd
2
G
Option Code
Option Code
C Address Designator
DD
x tuning slope – stability – 10 ppm
3.3 V
100
150
100
rd
2
185
295
375
130
30
80
25
12
C 7-bit address. Each unique start-up
Total Stablility (ppm, max, ±)
option code.
(±ppm) for VDD @
Device Revision Letter
R
Operating Temp Range (°C)
Minimum APR
G
Note 6
Note 6
Note 6
2.5 V
145
220
300
104
R = Tape & Reel
Blank = Trays
125
61.5
31.5
75
30
75
–40 to +85 °C
Note 6
Note 6
Note 6
1.8 V
155
105
235
25
75
25
50
70