82V3002PVG8 IDT, Integrated Device Technology Inc, 82V3002PVG8 Datasheet - Page 10

• Manufacturer Part Number: 82V3002PVG8
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of 82V3002PVG8

• Lead Free Status / Rohs Status: Compliant

IDT82V3002 WAN PLL WITH DUAL REFERENCE INPUTS
must be no greater than ±32 ppm.
source is the desired capture range. The sum of the accuracy of the master
timing source and the capture range of the IDT82V3002 will always equal
230 ppm. For example, if the master timing source is 100 ppm, then the
capture range will be 130 ppm.
Clock Oscillator
considered. This includes absolute frequency, frequency change over
temperature, output rise and fall times, output levels and duty cycle.
oscillator module may be used.
OSCi input of the IDT82V3002, and the OSCo output should be left open
as shown in Figure 7.
Crystal Oscillator
circuit made up of a crystal, resistor and capacitors is shown in Figure 8.
Another consideration in determining the accuracy of the master timing
When selecting a Clock Oscillator, numerous parameters must be
For applications requiring ±32 ppm clock accuracy, the following clock
FOX F7C-2E3-20.0 MHz
Frequency:
Tolerance:
Rise & Fall Time:
Duty Cycle:
The output clock should be connected directly (not AC coupled) to the
Alternatively, a Crystal Oscillator may be used. A complete oscillator
1 H inductor may improve stability and is optional.
IDT82V3002
Figure 8. Crystal Oscillator Circuit
Figure 7. Clock Oscillator Circuit
OSCo
OSCi
1 M
IDT82V3002
OSCi
OSCo
No Connection
20 MHz
25 ppm 0 C to 70 C
10 ns (0.33 V 2.97 V 15 pF)
40% to 60%
56 pF
100
20MHz
20 MHz OUT
+3.3 V
+3.3 V
GND
39 pF
1
3-50 pF
0.1 F
10
well as the load capacitance tolerance. Typically, for a 20 MHz crystal
specified with a 32 pF load capacitance, each 1 pF change in load
capacitance contributes approximately 9 ppm to the frequency deviation.
Consequently, capacitor tolerances, and stray capacitance have a major
effect on the accuracy of the oscillator frequency.
capacitate effects. If accuracy is not a concern, then the trimmer may be
removed, the 39 pF capacitor may be increased to 56 pF, and a wider
tolerance crystal may be substituted.
fundamental mode crystal permits a simpler oscillator circuit with no
additional filter components and is less likely to generate spurious
responses. The crystal specification is as follows:
JTAG
Reset Circuit
shown in Figure 9.
during power down conditions. The reset low time is not critical but should
be greater than 300 ns.
The accuracy of a crystal oscillator depends on the crystal tolerance as
The trimmer capacitor shown in Figure 8 may be used to compensate for
The crystal should be a fundamental mode type - not an overtone. The
Frequency:
Tolerance:
Oscillation Mode:
Resonance Mode:
Load Capacitance:
Maximum Series Resistance:
Approximate Drive Level:
e.g., R1B23B32-20.0 MHz
(20 ppm absolute, ±6 ppm 0 C to 50 C, 32 pF, 25 )
The IDT82V3002 support IEEE 1149.1 JTAG Scan.
A simple power up reset circuit with about a 50 s reset low time is
Resistor Rp is for protection only and limits current into the RST pin
Figure 9. Power-Up Reset Circuit
IDT82V3002
RST
INDUSTRIAL TEMPERATURE RANGE
1 k
Rp
20 MHz
As required
Fundamental
Parallel
32 pF
35
1 mW
10 k
R
3.3 V
1 F
C