SC16C852LIBS,151 NXP Semiconductors, SC16C852LIBS,151 Datasheet - Page 51

IC UART DUAL W/FIFO 32-HVQFN

SC16C852LIBS,151

Manufacturer Part Number
SC16C852LIBS,151
Description
IC UART DUAL W/FIFO 32-HVQFN
Manufacturer
NXP Semiconductors
Type
IrDA or RS- 485r
Datasheet

Specifications of SC16C852LIBS,151

Number Of Channels
2, DUART
Package / Case
32-VFQFN Exposed Pad
Features
Programmable
Fifo's
128 Byte
Protocol
RS485
Voltage - Supply
1.8V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
5 Mbps
Supply Voltage (max)
1.95 V
Supply Voltage (min)
1.65 V
Supply Current
5 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V
Transmitter And Receiver Fifo Counter
Yes
Mounting
Surface Mount
Pin Count
32
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4209
935283101151
SC16C852LIBS-S
NXP Semiconductors
SC16C852L
Product data sheet
Fig 24. Transmit timing in 16 mode
Fig 25. Transmit timing in 68 mode
(1) INT is active when TX FIFO is empty or TX FIFO drops below trigger level.
(2) INT is cleared when ISR is read or TX FIFO fills up to trigger level.
(1) IRQ is active when TX FIFO is empty or TX FIFO drops below trigger level.
(2) IRQ is cleared when ISR is read or TX FIFO fills up to trigger level.
TXA, TXB
CS (write)
TXA, TXB
IRQ
INT
(1)(2)
(1)(2)
IOW
t
d(CS-TX)W
active
active
start
t
start
bit
d(start-IRQL)
bit
t
d(IOW-TX)
All information provided in this document is subject to legal disclaimers.
t
d(start-INT)
D0
D0
1.8 V dual UART with 128-byte FIFOs and IrDA encoder/decoder
Rev. 4 — 1 February 2011
D1
D1
5 data bits
6 data bits
7 data bits
5 data bits
6 data bits
7 data bits
D2
D2
transmitter ready
16 baud rate clock
data bits (0 to 7)
data bits (0 to 7)
16 baud rate clock
active
D3
D3
D4
D4
D5
D5
TX ready
active
D6
D6
D7
D7
parity
parity
bit
bit
t
SC16C852L
d(CS-IRQH)W
stop
stop
bit
bit
t
d(IOW-INTL)
next data
next data
start
start
© NXP B.V. 2011. All rights reserved.
bit
active
bit
active
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