PEF 24470 H V1.3 Infineon Technologies, PEF 24470 H V1.3 Datasheet - Page 36

• Manufacturer Part Number: PEF 24470 H V1.3
• Description: IC MTSI-XL SWITCHING MQFP100
• Manufacturer: Infineon Technologies
• Series: SWITIr

Specifications of PEF 24470 H V1.3

• Function: Switching IC
• Interface: PCM, PLL
• Number Of Circuits: 1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 200mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-SQFP
• Includes: Clock Shift, Data Rate Adaption, Multipoint Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF24470HV1.3X; SP000007617

PRELIMINARY
3.4.4
The PLL reference source can be selected from the primary reference master source
(PFS, PDC, NTWK_1/_2). If the selected reference signal is less than 2.048 MHz the
main digital PLL is used to synchronize the analog PLL. The digital PLL is sourced from
the external oscillator, or crystal. In this case the analog PLL output frequency tolerance
is equal to the external oscillator/crystal frequency tolerance.
Furthermore the analog PLL can be sourced directly from the external oscillator, or
crystal, or from the PDC input. All generated output frequencies will have the same
tolerance as the selected input frequency.
3.5
The loop command in the configuration command register
automatic PCM-PCM loops.
All input lines are pad connected with the corresponding output line.
After the loop disable command was set the lines will be set in high-impedance after
approximately two frames.
3.6
Since the SWITI configuration can be programmed with defined instructions in the
and
access registers. The indirect addressing is started by writing one of the five read
configuration commands in the
two groups, internal configuration and external line configuration. The internal
configuration, e.g. clock generator, IREQ pin can be read with the command "Read
Configuration". The internal settings are decoded with the instruction bits I3..0. The data
rate for the PCM interface can be read with the "Read Local Bus (PCM) Line
Configuration" command. The "Read GPCLK Configuration" and "Read Bit/Clock Shift
Configuration" must be issued to get the GPCLK line configuration and the bit shift value.
The
process is complete. The recovery time is 240 ns. To read the correct configuration data
from the
before the
Preliminary Data Sheet
CMD2
TSV
TSV
and
TSV
PLL Synchronization
Loops
Read SWITI Configuration with Indirect Register Addressing
registers it is possible to read the current configuration through the indirect
register it is not allowed to use the command "Read Time-Slot Value"
CON
register has been read.
registers contain the required information after the internal read
CMD2
register. The five commands can be separated in
27
PEF 20450 / 20470 / 24470
CMD2
Architectural Description
provides support for
2001-11-20
CMD1