DS21Q50L+ Maxim Integrated Products, DS21Q50L+ Datasheet - Page 47

• Manufacturer Part Number: DS21Q50L+
• Description: IC TXRX E1 QUAD 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q50L+

• Function: Transceiver
• Interface: E1
• Number Of Circuits: 4
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 230mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: *
• Includes: AIS Alarms Detector and Generator, Loopback Functions, PRBS Generator / Detector, Remote Detector and Generator
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

Table 9-1. Master Port Selection
Table 9-2. Synthesizer Output Select
10.
Depending on the operating mode, the transmit clock can be derived from different sources. In a basic
configuration, where the IBO function is disabled, the transmit clock is normally sourced from the TCLK
pin. In this mode, a 2.048MHz clock with ±50ppm accuracy is applied to the TCLK pin. If the signal at
TCLK is lost, the DS21Q50 automatically switches to either the system reference clock present on the
REFCLK pin or to the recovered clock off the same port, depending on which source the host assigned as
the backup clock. At the same time the host can be notified of the loss-of-transmit clock through an
interrupt. The host can at any time force a switchover to one of the two backup clock sources, regardless
of the state of the TCLK pin.
When the IBO function is enabled, the transmit clock must be synchronous to the system clock, since
slips are not allowed in the transmit direction. In this mode, the TCLK pin is ignored and a transmit clock
is automatically provided by the IBO circuit by dividing the clock present on the SYSCLK pin by 2, 4, or
8. In this configuration, if the signal present on the SYSCLK pin is lost, the DS21Q50 automatically
switches to either the system reference clock or to the recovered clock off the same port, depending on
which source the host assigned as the backup clock. The host can at any time force a switchover to one of
the two backup clock sources, regardless of the state of the SYSCLK pin.
SCS2
CSS1
0
0
0
0
1
1
1
1
0
0
1
1
TRANSMIT CLOCK SOURCE
SCS1
CSS0
0
0
1
1
0
0
1
1
0
1
0
1
SCS0
0
1
0
1
0
1
0
1
SYNTHESIZER OUTPUT
FREQUENCY (MHz)
None (Master Port can be derived from
PORT SELECTED AS MASTER
another DS21Q50 in the system.)
16.384
2.048
4.096
8.192
Reserved for future use
Reserved for future use
Reserved for future use
Transceiver 1
Transceiver 2
Transceiver 3
Transceiver 4
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