DS21Q50L+ Maxim Integrated Products, DS21Q50L+ Datasheet - Page 39

IC TXRX E1 QUAD 100-LQFP

DS21Q50L+

Manufacturer Part Number
DS21Q50L+
Description
IC TXRX E1 QUAD 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q50L+

Function
Transceiver
Interface
E1
Number Of Circuits
4
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
230mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Includes
AIS Alarms Detector and Generator, Loopback Functions, PRBS Generator / Detector, Remote Detector and Generator
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
6. ERROR COUNT REGISTERS
A set of four counters in each transceiver of the DS21Q50 record bipolar (BPV) or code violations (CV),
errors in the CRC4 SMF codewords, E bits as reported by the far end, and word errors in the FAS. The E-
bit counter is reconfigured for counting errors in the PRBS pattern if receive PRBS is enabled. Each of
these four counters is automatically updated on either one-second boundaries (CCR2.70 = 0) or every
62.5ms (CCR2.7 = 1), as determined by the timer in status register 2 (SR2.4). Hence, these registers
contain performance data from either the previous second or the previous 62.5ms. The user can use the
interrupt from the one-second timer to determine when to read these registers. The user has a full second
(or 62.5ms) to read the counters before the data is lost. The counters saturate at their respective maximum
counts and do not roll over.
6.1 BPV or Code Violation Counter
Violation count register 1 (VCR1) is the most significant word and VCR2 is the least significant word of
a 16-bit counter that records either BPVs or CVs. If CCR2.6 = 0, the VCR counts BPVs. BPVs are
defined as consecutive marks of the same polarity. In this mode, if the HDB3 mode is set for the receiver
through CCR1.2, HDB3 codewords are not counted as BPVs. If CCR2.6 = 1, the VCR counts CVs, as
defined in ITU O.161. CVs are defined as consecutive bipolar violations of the same polarity. In most
applications, the framer should be programmed to count BPVs when receiving AMI code and to count
CVs when receiving HDB3 code. This counter increments at all times and is not disabled by loss-of-sync
conditions. The counter saturates at 65,535 and does not roll over. The bit error rate on an E1 line would
have to be greater than 10
Register Name:
Register Description:
Register Address:
Bit
Name
Name
NAME
V15
V0
V15
V7
7
VCR1.7
VCR2.0
BIT
V14
V6
6
VCR1, VCR2
Bipolar Violation Count Registers
00 Hex, 01 Hex
-2
before the VCR would saturate.
MSB of the 16-bit code violation count
LSB of the 16-bit code violation count
V13
V5
5
V12
V4
4
39 of 87
V11
V3
FUNCTION
3
V10
V2
2
V9
V1
1
V8
V0
0

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