MAX2991ECM+ Maxim Integrated Products, MAX2991ECM+ Datasheet - Page 13

IC TXRX FRONT-END 48LQFP

MAX2991ECM+

Manufacturer Part Number
MAX2991ECM+
Description
IC TXRX FRONT-END 48LQFP
Manufacturer
Maxim Integrated Products
Type
General Purposer
Datasheet

Specifications of MAX2991ECM+

Function
Analog Front-End Transceiver
Interface
SPI Serial
Number Of Circuits
1
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
36mA, 70mA
Power (watts)
1.54W
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LQFP
Includes
Automatic Gain Control (AGC)
Product
Analog Front End
Data Rate
1.2 Msps
Interface Type
Digital
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Supply Current
36 mA, 70 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Maximum Power Dissipation
1535 mW
Mounting Style
SMD/SMT
Number Of Channels
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 1. Register Map (continued)
Address 0x00: Rx Configuration (RXCONF<13:0>), Default: 0x0004
REGISTER
IIR1CONF
RXLPFBW<1:0>
RXCONV_EDGE
RDCONFMDEN
FRZTIME
DPTUN1
DPTUN2
Power-Line Communications (PLC) Integrated
IIR0B2
IIR0A1
IIR0A2
IIR1B0
IIR1B1
IIR1B2
IIR1A1
IIR1A2
BYPRXHPF
BIT NAME
ENRXBEN
CHIPENB
IDLEEN
______________________________________________________________________________________
WIDTH
<15:0>
<15:0>
<15:0>
<15:0>
<15:0>
<15:0>
<15:0>
<15:0>
<11:0>
<11:0>
<11:0>
<8:0>
LOCATION
(0 = LSB)
11–6
5, 4
12
13
0
1
2
3
ADDRESS
0x1A
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
DEFAULT
000000
Analog Front-End Transceiver
00
0
0
1
0
0
0
IIR filter B2 coefficient of first biquad
IIR filter A1 coefficient of first biquad
IIR filter A2 coefficient of first biquad
IIR filter configuration of second biquad
IIR filter B0 coefficient of second biquad
IIR filter B1 coefficient of second biquad
IIR filter B2 coefficient of second biquad
IIR filter A1 coefficient of second biquad
IIR filter A2 coefficient of second biquad
Process tuner digital settings
Process tuner digital settings
Freeze timer control
Active-high global power-down bit. Set to 1 to enable global
power-down mode.
Active-high idle mode-enable bit. Set to 1 to enable idle mode.
Active-high receiver path shutdown bit. Set to 1 to power down the
receive path. The receiver is normally shut down in transmit mode.
Active-high receiver HPF bypass bit. Set to 1 to allow receive HPF
bypass.
Receiver lowpass filter mode selection.
00: CENELEC A
01: Narrowband
10: FCC and ARIB
11: Full band
Reserved
Set to 1 to enable the read configuration mode of the AFE inter-
face.
This bit defines the active RXCLK edge used to sample the
RXCONV input (0 = rising edge, 1 = falling edge).
FUNCTION
FUNCTION
DEFAULT
0x1DAA
0x1DAA
0xCBEF
0xCEFF
0xC7F6
0x1F4D
0x0825
0x1613
0x0ED
0x5C6
0x3F4
0x006
13

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