STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 87
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STEVAL-PCC010V2
Manufacturer Part Number
STEVAL-PCC010V2
Description
BOARD EVAL FOR ST802RT1A
Manufacturer
STMicroelectronics
Series
-r
Datasheets
1.ST802RT1AFR.pdf
(58 pages)
2.STM32F205RBT6.pdf
(163 pages)
3.STEVAL-PCC010V2.pdf
(34 pages)
4.STEVAL-PCC010V2.pdf
(7 pages)
Specifications of STEVAL-PCC010V2
Design Resources
STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
ST802RT1A, STM32F207
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
MII, RMII
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11465
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STEVAL-PCC010V2
Manufacturer:
STMicroelectronics
Quantity:
1
- ST802RT1AFR PDF datasheet
- STM32F205RBT6 PDF datasheet #2
- STEVAL-PCC010V2 PDF datasheet #3
- STEVAL-PCC010V2 PDF datasheet #4
- Current page: 87 of 163
- Download datasheet (3Mb)
STM32F205xx, STM32F207xx
5.3.13
Table 34.
1. TBD stands for “to be defined”.
2. Guaranteed by design, not tested in production.
3. The maximum programming time is measured after 100K erase operations.
4. V
Table 35.
1. Based on characterization, not tested in production.
2. Cycling performed over the whole temperature range.
EMC characteristics
Susceptibility tests are performed on a sample basis during device characterization.
Functional EMS (electromagnetic susceptibility)
While a simple application is executed on the device (toggling 2 LEDs through I/O ports). the
device is stressed by two electromagnetic events until a failure occurs. The failure is
indicated by the LEDs:
●
●
Symbol
t
t
t
ERASE128KB
ERASE16KB
ERASE64KB
N
t
Symbol
RET
t
END
VPP
V
PP
t
V
Electrostatic discharge (ESD) (positive and negative) is applied to all device pins until
a functional disturbance occurs. This test is compliant with the IEC 61000-4-2 standard.
FTB: A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test is compliant
with the IEC 61000-4-4 standard.
t
I
prog
ME
prog
PP
PP
should only be connected during programming/erasing.
(4)
Endurance
Data retention
Parameter
Flash memory programming with V
Flash memory endurance and data retention
Double word programming
Sector (16 KB) erase time
Sector (64 KB) erase time
Sector (128 KB) erase time
Mass erase time
Programming voltage
V
Minimum current sunk on
the V
Cumulative time during
which V
PP
voltage range
PP
PP
Parameter
pin
is applied
T
T
1 kcycle
1 kcycle
10 kcycles
A
A
= –40 to +105 °C (7 suffix versions)
= –40 to +85 °C (6 suffix versions)
Doc ID 15818 Rev 6
(2)
(2)
(2)
at T
at T
at T
Conditions
A
A
= 85 °C
= 105 °C
A
T
= 55 °C
A
Conditions
= 0 to +40 °C
PP
(1)
Min
2.7
10
7
-
-
-
-
-
-
Electrical characteristics
(2)
Value
Min
30
10
20
TBD
TBD
TBD
10
Typ
6.8
16
-
-
-
-
(1)
Max
100
DD
3.6
9
1
-
-
-
-
-
(3)
(2)
and V
kcycles
Years
Unit
87/163
Unit
hour
mA
µs
V
V
SS
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