STEVAL-PCC010V2 STMicroelectronics, STEVAL-PCC010V2 Datasheet - Page 22
STEVAL-PCC010V2
Manufacturer Part Number
STEVAL-PCC010V2
Description
BOARD EVAL FOR ST802RT1A
Manufacturer
STMicroelectronics
Series
-r
Datasheets
1.ST802RT1AFR.pdf
(58 pages)
2.STM32F205RBT6.pdf
(163 pages)
3.STEVAL-PCC010V2.pdf
(34 pages)
4.STEVAL-PCC010V2.pdf
(7 pages)
Specifications of STEVAL-PCC010V2
Design Resources
STEVAL-PCC010V2 BOM STEVAL-PCC010V2 Schematic
Main Purpose
Interface, Ethernet Controller (PHY and MAC)
Embedded
Yes, MCU, 32-Bit
Utilized Ic / Part
ST802RT1A, STM32F207
Primary Attributes
1 Port, 100BASE-TX/10BASE-T
Secondary Attributes
MII, RMII
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11465
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
STEVAL-PCC010V2
Manufacturer:
STMicroelectronics
Quantity:
1
- ST802RT1AFR PDF datasheet
- STM32F205RBT6 PDF datasheet #2
- STEVAL-PCC010V2 PDF datasheet #3
- STEVAL-PCC010V2 PDF datasheet #4
- Current page: 22 of 163
- Download datasheet (3Mb)
Description
2.2.17
a.
22/163
Voltage regulator
The regulator has five operating modes:
●
●
Regulator ON
The regulator ON modes are activated by default on LQFP packages.On WLCSP66
package, they are activated by connecting both REGOFF and IRROFF pins to V
only REGOFF must be connected to V
V
There are three regulator ON modes:
●
●
●
Regulator OFF
●
V
temperature range.
DD
DD
/V
minimum value is 1.8 V
Regulator ON
–
–
–
Regulator OFF
–
–
MR is used in nominal regulation mode (Run)
LPR is used in Stop mode
Power-down is used in Standby mode:
The regulator output is in high impedance: the kernel circuitry is powered down,
inducing zero consumption (but the contents of the registers and SRAM are lost).
Regulator OFF/internal reset ON
On WLCSP66 package, this mode is activated by connecting REGOFF pin to V
IRROFF pin to V
(IRROFF not available).
The regulator OFF/internal reset ON mode allows to supply externally a 1.2 V voltage
source through V
The following conditions must be respected:
–
–
DDA
Main regulator mode (MR)
Low power regulator (LPR)
Power-down
Regulator OFF/internal reset ON
Regulator OFF/internal reset OFF
V
between power domains.
If the time for V
reach 1.8 V
minimum value of 1.65 V is obtained when the device operates in a reduced
DD
should always be higher than V
(a)
SS
CAP_1
, then PA0 should be connected to the NRST pin (see
. On UFBGA176 package, only REGOFF must be connected to V
CAP_1
(a)
and V
.
Doc ID 15818 Rev 6
and V
CAP_2
CAP_2
SS
pins, in addition to V
on UFBGA176 package (IRROFF is not available).
to reach 1.08 V is faster than the time for V
CAP_1
and V
CAP_2
STM32F205xx, STM32F207xx
DD
.
to avoid current injection
Figure
SS
, while
DD
6).
DD
and
DD
to
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