PIC18F1320-H/ML Microchip Technology, PIC18F1320-H/ML Datasheet - Page 167
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F1320-H/ML
Manufacturer Part Number
PIC18F1320-H/ML
Description
IC MCU 8BIT 8KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1320-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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18.0
In many applications, the ability to determine if the
device voltage (V
is a desirable feature. A window of operation for the
application can be created, where the application soft-
ware can do “housekeeping tasks”, before the device
voltage exits the valid operating range. This can be
done using the Low-Voltage Detect module.
This module is a software programmable circuitry,
where a device voltage trip point can be specified.
When the voltage of the device becomes lower then the
specified point, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the inter-
rupt vector address and the software can then respond
to that interrupt source.
The Low-Voltage Detect circuitry is completely under
software control. This allows the circuitry to be turned
off by the software, which minimizes the current
consumption for the device.
FIGURE 18-1:
© 2007 Microchip Technology Inc.
LOW-VOLTAGE DETECT
V
V
DD
A
B
) is below a specified voltage level
TYPICAL LOW-VOLTAGE DETECT APPLICATION
Time
T
A
T
B
Figure 18-1 shows a possible application voltage curve
(typically for batteries). Over time, the device voltage
decreases. When the device voltage equals voltage V
the LVD logic generates an interrupt. This occurs at
time T
until the device voltage is no longer in valid operating
range, to shut down the system. Voltage point V
minimum valid operating voltage specification. This
occurs at time T
time for shutdown.
The block diagram for the LVD module is shown in
Figure 18-2 (following page). A comparator uses an
internally generated reference voltage as the set point.
When the selected tap output of the device voltage
crosses the set point (is lower than), the LVDIF bit is set.
Each node in the resistor divider represents a “trip
point” voltage. The “trip point” voltage is the minimum
supply voltage level at which the device can operate
before the LVD module asserts an interrupt. When the
supply voltage is equal to the trip point, the voltage
tapped off of the resistor array is equal to the 1.2V
internal reference voltage generated by the voltage
reference module. The comparator then generates an
interrupt signal setting the LVDIF bit. This voltage is
software programmable to any one of 16 values (see
Figure 18-2).
programming the LVDL3:LVDL0 bits (LVDCON<3:0>).
Legend: V
A
. The application software then has the time,
PIC18F1220/1320
The
B
V
operating voltage
. The difference, T
A
B
= LVD trip point
= Minimum valid device
trip
point
DS39605F-page 165
B
is
– T
selected
A
, is the total
B
is the
by
A
,
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