PIC18F1320-H/ML Microchip Technology, PIC18F1320-H/ML Datasheet - Page 130
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC18F1320-H/ML
Manufacturer Part Number
PIC18F1320-H/ML
Description
IC MCU 8BIT 8KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F1220-ISO.pdf
(308 pages)
Specifications of PIC18F1320-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
28-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F1220/1320
15.5.7.1
The auto-shutdown feature can be configured to allow
automatic restarts of the module, following a shutdown
event. This is enabled by setting the PRSEN bit of the
PWM1CON register (PWM1CON<7>).
In Shutdown mode with PRSEN = 1 (Figure 15-12), the
ECCPASE bit will remain set for as long as the cause
of the shutdown continues. When the shutdown
condition clears, the ECCPASE bit is automatically
cleared. If PRSEN = 0 (Figure 15-13), once a shutdown
condition occurs, the ECCPASE bit will remain set until
it is cleared by firmware. Once ECCPASE is cleared,
the Enhanced PWM will resume at the beginning of the
next PWM period.
Independent of the PRSEN bit setting, the ECCPASE
bit cannot be cleared as long as the cause of the
shutdown persists.
The Auto-Shutdown mode can be forced by writing a ‘1’
to the ECCPASE bit.
FIGURE 15-12:
FIGURE 15-13:
DS39605F-page 128
Note:
Shutdown
Shutdown
PWM
ECCPASE bit
PWM
ECCPASE bit
Writing to the ECCPASE bit is disabled
while a shutdown condition is active.
Auto-Shutdown and
Automatic Restart
Activity
Activity
Event
Event
PWM AUTO-SHUTDOWN (PRSEN = 1, AUTO-RESTART ENABLED)
PWM AUTO-SHUTDOWN (PRSEN = 0, AUTO-RESTART DISABLED)
Duty Cycle
Duty Cycle
PWM Period
PWM Period
Dead Time
Dead Time
Duty Cycle
Duty Cycle
Dead Time
Dead Time
PWM Period
PWM Period
15.5.8
When the ECCP module is used in the PWM mode, the
application hardware must use the proper external pull-
up and/or pull-down resistors on the PWM output pins.
When the microcontroller is released from Reset, all of
the I/O pins are in the high-impedance state. The
external circuits must keep the power switch devices in
the off state, until the microcontroller drives the I/O pins
with the proper signal levels, or activates the PWM
output(s).
The CCP1M1:CCP1M0 bits (CCP1CON<1:0>) allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (P1A/P1C and P1B/P1D). The PWM output
polarities must be selected before the PWM pins are
configured as outputs. Changing the polarity configura-
tion while the PWM pins are configured as outputs is
not recommended, since it may result in damage to the
application circuits.
The P1A, P1B, P1C and P1D output latches may not be
in the proper states when the PWM module is initialized.
Enabling the PWM pins for output at the same time as
the ECCP module may cause damage to the application
circuit. The ECCP module must be enabled in the proper
output mode and complete a full PWM cycle, before con-
figuring the PWM pins as outputs. The completion of a
full PWM cycle is indicated by the TMR2IF bit being set
as the second PWM period begins.
START-UP CONSIDERATIONS
Duty Cycle
© 2007 Microchip Technology Inc.
Duty Cycle
PWM Period
Dead Time
PWM Period
Dead Time
Cleared by Firmware
ECCPASE
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