LFSC3GA15E-7FN256C Lattice, LFSC3GA15E-7FN256C Datasheet - Page 45

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LFSC3GA15E-7FN256C

Manufacturer Part Number
LFSC3GA15E-7FN256C
Description
IC FPGA 15.2KLUTS 256FPBGA
Manufacturer
Lattice
Datasheet

Specifications of LFSC3GA15E-7FN256C

Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Package / Case
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFSC3GA15E-7FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
www.latticesemi.com
© 2008 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
June 2008
Absolute Maximum Ratings
Supply Voltage V
Supply Voltage V
Supply Voltage V
Supply Voltage V
Supply Voltage V
Input or I/O Tristate Voltage Applied (Banks 1, 4, 5) . . . . . . . . . . . . . . . . . . . -0.5 to 3.6V
Input or I/O Tristate Voltage Applied (Banks 2, 3, 6, 7) . . . . . . . . . . . . . . . . -0.5 to 2.75V
Storage Temperature (Ambient) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C
Junction Temperature Under Bias (Tj) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C
Notes:
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation of the
2. Compliance with the Lattice Thermal Management document is required.
3. All voltages referenced to GND.
4. Undershoot and overshoot of -2V to (VIHMAX +2) volts is permitted for a duration of <20ns.
Recommended Operating Conditions
V
V
V
V
V
V
V
V
V
V
t
t
1. If V
2. See recommended voltages by I/O standard in subsequent table.
3. When V
4. V
5. V
6. If V
JCOM
JIND
CC
CCAUX
CCIO
CCIO
CC12
DDIB
DDOB
DDAX25
CCJ
TT
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
on the device.
proper noise decoupling between the digital VCC and analog VCC12 supplies.
2, 3
5
CC12
CC,
1, 5
Symbol
CCIO
CCIO
1, 2, 5, 6
1, 2, 5, 6
4, 5
V
6
CCIO
cannot be lower than V
TT
or V
for a bank is nominally 1.2V/1.5V/1.8V, then V
termination is not required, or used to provide the common mode termination voltage (V
(all banks), V
CCJ
is set to 2.5V, they must be connected to the same power supply as V
CC,
CCAUX,
CCJ
CCIO
CCIO
Core Supply Voltage (Nominal 1.2V Operation)
Programmable I/O Auxiliary Supply Voltage
Programmable I/O Driver Supply Voltage (Banks 1, 4, 5)
Programmable I/O Driver Supply Voltage (Banks 2, 3, 6, 7)
Internal 1.2V Power Supply Voltage for Configuration Logic and
FPGA PLL, SERDES PLL Power Supply Voltage and SERDES
Analog Supply Voltage
SERDES Input Buffer Supply Voltage
SERDES Output Buffer Supply Voltage
SERDES Termination Auxiliary Supply Voltage
Supply Voltage for IEEE 1149.1 Test Access Port
Programmable I/O Termination Power Supply
Junction Temperature, Commercial Operation
Junction Temperature, Industrial Operation
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 3.6V
CC12,
(Banks 1, 4, 5). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 3.6V
(Banks 2, 3, 6, 7). . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.75V
CC12
V
DDAX25,
CC
and V
V
DDIB,
at any time. For 1.2V operation, it is recommended that the V
CCJ
V
V
TT
must reach their minimum values before configuration will proceed.
DDOB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.75V
DC and Switching Characteristics
. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 to 1.6V
Parameter
CCAUX
LatticeSC/M Family Data Sheet
must always be higher than V
3-1
CCAUX
CCIO
.
CC
during power up.
and V
CMT
2.375
2.375
Min.
0.95
1.14
1.14
1.14
1.14
1.14
1.71
-40
0.5
DS1004
0
), these pins can be left unconnected
CC12
supplies be tied together with
V
CCAUX
DC and Switching_01.9
2.625
2.625
1.575
1.575
2.625
Max.
1.26
3.45
1.26
3.45
+85
105
Data Sheet DS1004
- 0.5
Units
C
C
V
V
V
V
V
V
V
V
V
V

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