74LV132PW NXP Semiconductors, 74LV132PW Datasheet - Page 11
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74LV132PW
Manufacturer Part Number
74LV132PW
Description
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT NAND SCHMITT TRIG
Manufacturer
NXP Semiconductors
Datasheet
1.74LV132N112.pdf
(17 pages)
Specifications of 74LV132PW
Product
NAND
Logic Family
LV
Number Of Gates
4
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
65 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-402
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Details
Other names
74LV132PW,112
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LV132PW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
74LV132PWЈ¬118
Manufacturer:
NXP
Quantity:
2 500
NXP Semiconductors
Fig 14. Package outline SOT108-1 (SO14)
74LV132_5
Product data sheet
SO14: plastic small outline package; 14 leads; body width 3.9 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
inches
UNIT
mm
OUTLINE
VERSION
SOT108-1
0.069
max.
1.75
A
0.010
0.004
0.25
0.10
A
14
1
1
Z
pin 1 index
y
0.057
0.049
1.45
1.25
A
2
076E06
IEC
0.01
0.25
e
A
3
0.019
0.014
0.49
0.36
b
p
D
0.0100
0.0075
0.25
0.19
MS-012
JEDEC
c
REFERENCES
0.35
0.34
8.75
8.55
D
(1)
0
Rev. 05 — 2 July 2009
0.16
0.15
E
4.0
3.8
b
(1)
p
8
7
JEITA
scale
1.27
0.05
2.5
e
w
M
c
0.244
0.228
H
6.2
5.8
E
A
2
0.041
5 mm
1.05
A
L
1
0.039
0.016
1.0
0.4
L
p
Quad 2-input NAND Schmitt trigger
H
E
E
detail X
0.028
0.024
0.7
0.6
Q
L
PROJECTION
L
EUROPEAN
0.25
0.01
p
Q
v
(A )
3
0.25
0.01
A
w
0.004
A
0.1
© NXP B.V. 2009. All rights reserved.
v
X
y
74LV132
M
ISSUE DATE
99-12-27
03-02-19
A
0.028
0.012
Z
0.7
0.3
(1)
SOT108-1
8
0
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