CD4023BCM Fairchild Semiconductor, CD4023BCM Datasheet - Page 3

Gates (AND / NAND / OR / NOR) Trp 3-Inp NAND Gate

CD4023BCM

Manufacturer Part Number
CD4023BCM
Description
Gates (AND / NAND / OR / NOR) Trp 3-Inp NAND Gate
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of CD4023BCM

Product
NAND
Logic Family
CD4000
Number Of Gates
3
Number Of Lines (input / Output)
3 / 1
High Level Output Current
- 4.2 mA
Low Level Output Current
4.2 mA
Propagation Delay Time
250 ns
Supply Voltage (max)
15 V
Supply Voltage (min)
5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOIC-14 Narrow
Minimum Operating Temperature
- 55 C
Lead Free Status / Rohs Status
No
t
t
t
t
C
C
PHL
PLH
THL
TLH
AC Electrical Characteristics
T
Note 5: AC Parameters are guaranteed by DC correlated testing.
Note 6: C
For complete explanation, see Family Characteristics Application Note AN-90.
IN
PD
Symbol
A
,
25 C, C
PD
determines the no load AC power consumption of any CMOS device.
Propagation Delay, HIGH-to-LOW Level
Propagation Delay, LOW-to-HIGH Level
Transition Time
Average Input Capacitance
Power Dissipation Capacity (Note 6)
L
50 pF, R
Parameter
L
200k, unless otherwise specified
(Note 5)
Conditions
V
V
V
V
V
V
3
V
V
V
Any Input
Any Gate
DD
DD
DD
DD
DD
DD
DD
DD
DD
10V
15V
10V
15V
10V
15V
5V
5V
5V
Min
Typ
130
110
60
40
50
35
90
50
40
17
5
www.fairchildsemi.com
Max
250
100
250
100
200
100
7.5
70
70
80
Units
ns
ns
ns
pF
pF

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