ICS8735AM-21 IDT, Integrated Device Technology Inc, ICS8735AM-21 Datasheet - Page 15
![](/photos/31/26/312656/20pin_soic_sml.jpg)
ICS8735AM-21
Manufacturer Part Number
ICS8735AM-21
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Zero Delay PLL Clock Generatorr
Datasheet
1.ICS8735AM-21.pdf
(20 pages)
Specifications of ICS8735AM-21
Number Of Elements
1
Supply Current
150mA
Pll Input Freq (min)
31.25MHz
Pll Input Freq (max)
700MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
SOIC
Output Frequency Range
Up to 700MHz
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Pin Count
20
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ICS8735AM-21LF
Manufacturer:
IDT
Quantity:
165
Company:
Part Number:
ICS8735AM-21LFT
Manufacturer:
XILINX
Quantity:
491
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS8735-21.
Equations and example calculations are also provided.
1.
The total power dissipation for the ICS8735-21 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
Total Power_
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the device.
The maximum recommended junction temperature for HiPerClockS devices is 125°C.
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance θ
and a multi-layer board, the appropriate value is 83.2°C/W per Table 7A below.
Therefore, Tj for an ambient temperature of 70°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type
of board (single layer or multi-layer).
Table 7A. Thermal Resistance
Table 7B. Thermal Resistance
IDT™ / ICS™ 3.3V LVPECL ZERO DELAY CLOCK GENERATOR
Linear Feet per Minute
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
Meters per Second
Multi-Layer PCB, JEDEC Standard Test Boards
ICS8735-21
700MHZ, DIFFERENTIAL-TO-3.3V LVPECL ZERO DELAY CLOCK GENERATOR
Power Dissipation.
•
•
70°C + 0.580W * 83.2°C/W = 118.3°C. This is well below the limit of 125°C.
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30mW = 60mW
The equation for Tj is as follows: Tj = θ
Tj = Junction Temperature
θ
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
JA
A
= Ambient Temperature
= Junction-to-Ambient Thermal Resistance
MAX
= (3.465V, with all outputs switching) = 519.8mW + 60mW = 579.8mW
MAX
MAX
= V
= 30mW/Loaded output pair
CC_MAX
θ
θ
JA
JA
* I
CC_MAX
for 20 Lead SOIC, Forced Convection
for 32 Lead VFQFN, Forced Convection
CC
= 3.3V + 5% = 3.465V, which gives worst case results.
JA
= 3.465V * 150mA = 519.8mW
* Pd_total + T
θ
θ
JA
83.2°C/W
46.2°C/W
JA
37.0°C/W
vs. Air Flow
A
by Velocity
0
0
15
65.7°C/W
39.7°C/W
32.4°C/W
200
1
JA
must be used. Assuming no air flow
ICS8735AM-21 REV. A JULY 31, 2008
57.5°C/W
36.8°C/W
29.0°C/W
500
2.5